C515C_9711 Datasheet, PDF (167/268 Pages) Siemens Semiconductor Group – 8-Bit CMOS Microcontroller

On-Chip Peripheral Components
C515C
6.5.4 Initialization and Reset
The CAN controller is reset by a hardware reset or by a watchdog timer reset of the C515C. A reset
operation of the CAN controller performs the following actions :
– sets the TXDC output to “1” (recessive)
– clears the error counters
– resets the busoff state
– switches the control register’s low byte to 01H
– leaves the control register’s high byte and the interrupt register undefined
– does not change the other registers including the message objects (notified as UUUU)
The first hardware reset after power-on leaves the unchanged registers in an undefined state, of
course. The value 01H in the control register’s low byte prepares for software initialization.
Software Initialization
The software Initialization is enabled by setting bit INIT in the control register. This can be done by
the microcontroller via software, or automatically by the CAN controller on a hardware reset, or if the
EML switches to busoff state.
While INIT is set
– all message transfer from and to the CAN bus is stopped
– the CAN bus output TXDC is “1” (recessive)
– the control bits NEWDAT and RMTPND of the last message object are reset
– the counters of the EML are left unchanged.
Setting bit CCE in addition, allows to change the configuration in the bit timing register.
For initialization of the CAN Controller, the following actions are required:
– configure the bit timing register (CCE required)
– set the Global Mask Registers
– initialize each message object.
If a message object is not needed, it is sufficient to clear its message valid bit (MSGVAL), ie. to
define it as not valid. Otherwise, the whole message object has to be initialized.
After the initialization sequence has been completed, the microcontroller clears the INIT bit.
Now the BSP synchronizes itself to the data transfer on the CAN bus by waiting for the occurrence
of a sequence of 11 consecutive recessive bits (ie. bus idle) before it can take part in bus activities
and start message transfers.
The initialization of the message objects is independent of the state of bit INIT and can be done on
the fly, the message objects should all be configured to particular identifiers or set to not valid before
the BSP starts the message transfer, however.
To change the configuration of a message object during normal operation, the microcontroller first
clears bit MSGVAL, which defines it as not valid. When the configuration is completed, MSGVAL is
set again.
Note that the busoff recovery sequence cannot be shortened by setting or resetting INIT. If the
device goes busoff, it will set INIT of its own accord, stopping all bus activities. Once INIT has been
cleared by the microcontroller, the device will then wait for 129 occurrences of Bus Idle before
Semiconductor Group
6-104
1997-11-01