MC68HC11PH8 Datasheet, PDF (56/264 Pages) Motorola, Inc – High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit

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08/Apr/97@13:55 [DS97 v 4.1]
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PH8.DS03/Modes+mem
3.3
System initialization
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Registers and bits that control initialization and the basic operation of the MCU are protected
against writes except under special circumstances. The following table lists registers that can be
written only once after reset, or that must be written within the first 64 cycles after reset.
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Table 3-3 Registers with limited write access
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5
6
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Register
address
Register
name
$x024 Timer interrupt mask register 2 (TMSK2)
$x02D LCD control and data register (LCDR)
$x035 Block protect register (BPROT)
Must be written in Write
Þrst 64 cycles once only
(1)
Ñ
No
(2)
(3)
Ñ
$x037 EEPROM mapping register (INIT2)
No
Yes
$x038 System conÞguration options register 2 (OPT2)
No
(4)
$x039 System conÞguration options register (OPTION)
(5)
Ñ
$x03D RAM and I/O map register (INIT)
(6)
Ñ
(1) When SMOD = 0, bits 1 and 0 can be written only once, during the Þrst 64 cycles, after
which they become read-only. When SMOD = 1, however, these bits can be written at any
time. All other bits can be written at any time.
(2) Bit 0 (LCDE) can be written only once.
(3) Bits can be written to zero once and only in the Þrst 64 cycles or in special modes. Bits can
be set to one at any time.
(4) Bit 0 (DISE) and bit 1 (EXT4X) can be written only once; bit 4 (IRVNE) can be written only
once in single chip and user expanded modes.
(5) Bits 5, 4, 2, 1, and 0 can be written once and only in the Þrst 64 cycles; when SMOD = 1,
however, bits 5, 4, 2, 1, and 0 can be written at any time. All other bits can be written at any time.
(6) When SMOD = 0, bits can be written only once, during the Þrst 64 cycles, after which the
register becomes read-only. When SMOD = 1, bits can be written at any time.
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3.3.1 Mode selection
The four mode variations are selected by the logic states of the mode A (MODA) and mode B
(MODB) pins during reset. The MODA and MODB logic levels determine the logic state of special
mode (SMOD) and the mode A (MDA) control bits in the highest priority I-bit interrupt and
miscellaneous (HPRIO) register.
After reset is released, the mode select pins no longer influence the MCU operating mode. In
single chip operating mode, MODA pin is connected to a logic zero. In expanded mode, MODA is
normally connected to V_DD through a pull-up resistor of 4.7 kΩ. The MODA pin also functions as
the load instruction register (LIR) pin when the MCU is not in reset. The open-drain active low LIR
output pin drives low during the first E cycle of each instruction, if enabled by the LIRDV bit in the
OPT2 register. The MODB pin also functions as the stand-by power input (VSTBY), which allows
the RAM contents to be maintained in the absence of V_DD.
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MOTOROLA
3-10
OPERATING MODES AND ON-CHIP MEMORY
¬^TPG
MC68HC11PH8