MC68HC11PH8 Datasheet, PDF (11/264 Pages) Motorola, Inc – High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit

Paragraph
Number
Title
Page
Number
4.2 Port B.....................................................................................................................4-3
4.2.1 PORTB — Port B data register ........................................................................4-3
4.2.2 DDRB — Data direction register for port B ......................................................4-3
4.3 Port C.....................................................................................................................4-4
4.3.1 PORTC — Port C data register........................................................................4-4
4.3.2 DDRC — Data direction register for port C......................................................4-4
4.4 Port D.....................................................................................................................4-5
4.4.1 PORTD — Port D data register........................................................................4-5
4.4.2 DDRD — Data direction register for port D......................................................4-5
4.5 Port E.....................................................................................................................4-6
4.5.1 PORTE — Port E data register ........................................................................4-6
4.6 Port F .....................................................................................................................4-7
4.6.1 PORTF — Port F data register.........................................................................4-7
4.6.2 DDRF — Data direction register for port F.......................................................4-7
4.7 Port G ....................................................................................................................4-8
4.7.1 PORTG — Port G data register .......................................................................4-8
4.7.2 DDRG — Data direction register for port G .....................................................4-8
4.8 Port H.....................................................................................................................4-9
4.8.1 PORTH — Port H data register........................................................................4-9
4.8.2 DDRH — Data direction register for port H......................................................4-9
4.8.3 Wired-OR interrupt...........................................................................................4-10
4.8.3.1
WOIEH — WOI enable (WOIEH) ...............................................................4-10
4.9 Internal pull-up resistors ........................................................................................4-11
4.9.1 PPAR — Port pull-up assignment register .......................................................4-11
4.10 System configuration .............................................................................................4-11
4.10.1 OPT2 — System configuration options register 2............................................4-12
4.10.2 CONFIG — System configuration register .......................................................4-13
5
SERIAL COMMUNICATIONS INTERFACE
5.1
5.2
5.3
5.4
5.4.1
5.4.2
5.5
5.6
5.6.1
5.6.2
5.6.3
5.6.4
5.6.5
5.6.6
Data format ............................................................................................................5-2
Transmit operation .................................................................................................5-2
Receive operation..................................................................................................5-2
Wake-up feature ....................................................................................................5-4
Idle-line wake-up ..............................................................................................5-4
Address-mark wake-up ....................................................................................5-4
SCI error detection ................................................................................................5-5
SCI registers ..........................................................................................................5-5
SCBDH, SCBDL — SCI baud rate control registers ........................................5-6
SCCR1 — SCI control register 1 .....................................................................5-7
SCCR2 — SCI control register 2 .....................................................................5-9
SCSR1 — SCI status register 1.......................................................................5-10
SCSR2 — SCI status register 2.......................................................................5-12
SCDRH, SCDRL — SCI data high/low registers .............................................5-12
MC68HC11PH8
TABLE OF CONTENTS
TPG
MOTOROLA
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