MC68HC11PH8 Datasheet, PDF (15/264 Pages) Motorola, Inc – High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit

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Number
Title
10
RESETS AND INTERRUPTS
Page
Number
10.1 Resets .................................................................................................................10-1
10.1.1 Power-on reset ...............................................................................................10-1
10.1.2 External reset (RESET) .................................................................................10-2
10.1.3 COP reset ......................................................................................................10-2
10.1.3.1
COPRST — Arm/reset COP timer circuitry register.................................10-3
10.1.4 Clock monitor reset ........................................................................................10-4
10.1.5 OPTION — System configuration options register 1 .....................................10-4
10.1.6 CONFIG — Configuration control register ....................................................10-6
10.2 Effects of reset.....................................................................................................10-7
10.2.1 Central processing unit ..................................................................................10-8
10.2.2 Memory map ..................................................................................................10-8
10.2.3 Parallel I/O .....................................................................................................10-8
10.2.4 Timer..............................................................................................................10-8
10.2.5 Real-time interrupt (RTI) ................................................................................10-9
10.2.6 Pulse accumulator .........................................................................................10-9
10.2.7 Computer operating properly (COP) ..............................................................10-9
10.2.8 8-bit modulus timer system ............................................................................10-9
10.2.9 Serial communications interface (SCI)...........................................................10-9
10.2.10 Serial peripheral interface (SPI) .....................................................................10-10
10.2.11 Analog-to-digital converter .............................................................................10-10
10.2.12 LCD module ...................................................................................................10-10
10.2.13 System ...........................................................................................................10-10
10.3 Reset and interrupt priority ..................................................................................10-11
10.3.1 HPRIO — Highest priority I-bit interrupt and misc. register ...........................10-12
10.4 Interrupts .............................................................................................................10-15
10.4.1 Interrupt recognition and register stacking.....................................................10-15
10.4.2 Nonmaskable interrupt request (XIRQ)..........................................................10-16
10.4.3 Illegal opcode trap..........................................................................................10-16
10.4.4 Software interrupt...........................................................................................10-16
10.4.5 Maskable interrupts........................................................................................10-17
10.4.6 Reset and interrupt processing ......................................................................10-17
10.5 Low power operation ...........................................................................................10-17
10.5.1 WAIT ..............................................................................................................10-17
10.5.2 STOP .............................................................................................................10-18
11
CPU CORE AND INSTRUCTION SET
11.1 Registers .............................................................................................................11-1
11.1.1 Accumulators A, B and D...............................................................................11-2
11.1.2 Index register X (IX) .......................................................................................11-2
11.1.3 Index register Y (IY) .......................................................................................11-2
MC68HC11PH8
TABLE OF CONTENTS
TPG
MOTOROLA
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