MC68HC11PH8 Datasheet, PDF (164/264 Pages) Motorola, Inc – High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit

8.2.2.2 Clock prescaler selection
The three available clocks are clock A, clock B, and clock S (scaled). Clock A can be software
selected to be E, E/2, E/4, or E/8. Clock B can be software selected to be E, E/2, E/4,..., E/128.
The scaled clock (clock S) uses clock A as an input and divides it with a reloadable counter. The
rates available are software selectable to be clock A/2, down to clock A /512.
The clock source portion of the block diagram shows the three clock sources and how the scaled
clock is created. Clock A is an input to an 8-bit counter which is then compared to a user
programmable scale value. When they match, this circuit has an output that is divided by two and
the counter is reset.
Each PWM timer channel can be driven by one of two clocks. Refer to Figure 8-5.
PCKA[2:1] — Prescaler for clock A
Determines the frequency of clock A. Refer to Table 8-5.
Bit 3 — Not implemented; always reads zero
PCKB[3:1] — Prescaler for clock B
Determines the frequency of clock B. Refer to Table 8-5.
8
Table 8-5 Clock A and clock B prescalers
PCKA[2:1]
00
01
10
11
Clock A
E
E/2
E/4
E/8
PCKB[3:1]
000
001
010
011
100
101
110
111
Clock B
E
E/2
E/4
E/8
E/16
E/32
E/64
E/128
MOTOROLA
8-30
TIMING SYSTEM
TPG
MC68HC11PH8