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MC68HC11PH8 Datasheet, PDF (236/264 Pages) Motorola, Inc – High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit | |||
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A.5.4 Serial peripheral interface timing
(VDD = 5.0 Vdc ± 10%, VSS = 0 Vdc, TA = TL to TH)
Num
Characteristic (1)
2.0 MHz
3.0 MHz
4.0 MHz
Symbol
Unit
Min. Max. Min. Max. Min. Max.
Operating frequency
Master fOP(M)
0
0.5 0 0.5
0 0.5 fOP
Slave fOP(S)
0 2.0 0 3.0 0 4.0 MHz
1 Cycle time
2 Enable lead time (2)
3 Enable lag time (2)
Master tCYC(M) 2.0 Ã 2.0 Ã 2.0 Ã tCYC
Slave tCYC(S) 500 Ã 333 Ã 250 Ã ns
Master tLEAD(M) Ã
Slave tLEAD(S) 250
Ã
Ã
Ã
240
Ã
Ã
Ã
200
Ã
Ã
ns
Master tLAG(M) Ã
Slave tLAG(S) 250
Ã
Ã
Ã
240
Ã
Ã
Ã
200
Ã
Ã
ns
4 Clock (SCK) high time
Master tW(SCKH)M 340
Slave tW(SCKH)S 190
Ã
Ã
227
127
Ã
Ã
130
85
Ã
Ã
ns
5 Clock (SCK) low time
Master tW(SCKL)M 340
Slave tW(SCKL)S 190
Ã
Ã
227
127
Ã
Ã
130
85
Ã
Ã
ns
6 Input data set-up time
Master
Slave
tSU(M)
tSU(S)
100
100
Ã
Ã
100
100
Ã
Ã
100
100
Ã
Ã
ns
7 Input data hold time
Master tH(M)
Slave tH(S)
100 Ã 100 Ã 100 Ã
100 Ã 100 Ã 100 Ã
ns
8 Access time (from high-z to data active) Slave tA
0 120 0 120 0 120 ns
9 Disable time (hold time to high-z state) Slave tDIS
10 Data valid (after enable edge) (3)
tV(S)
à 300 à 300 à 300 ns
à 240 à 167 à 125 ns
11 Output data hold time (after enable edge)
12 Rise time (3)
tHO
0 Ã 0 Ã 0 Ã ns
SPI outputs (SCK, MOSI and MISO)
SPI inputs (SCK, MOSI, MISO and SS)
13 Fall time (3)
tRM
à 100 à 100 à 100 ns
tRS
à 2.0 à 2.0 à 2.0 µs
SPI outputs (SCK, MOSI and MISO)
SPI inputs (SCK, MOSI, MISO and SS)
tFM
à 100 à 100 à 100 ns
tFS
à 2.0 à 2.0 à 2.0 µs
(1) All timing is given with respect to 20% and 70% of VDD, unless otherwise noted.
(2) Signal production depends on software.
(3) Assumes 200pF load on all SPI pins.
12
MOTOROLA
A-12
ELECTRICAL SPECIFICATIONS (STANDARD)
TPG
MC68HC11PH8
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