MC68HC11PH8 Datasheet, PDF (198/264 Pages) Motorola, Inc – High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit

10
Table 10-5 Interrupt and reset vector assignments
Vector address
Interrupt source
FFC0, C1 Ð FFCC, CD reserved
FFCE, CF
Â¥ Wired-OR port H
FFD0, D1
¥ 8-bit modulus timer A underßow
¥ 8-bit modulus timer B underßow
¥ 8-bit modulus timer C underßow
FFD2, D3
Â¥ SCI2/MI BUS receive data register full
Â¥ SCI2/MI BUS receiver overrun
Â¥ SCI2 transmit data register empty
Â¥ SCI2 transmit complete
Â¥ SCI2 idle line detect
FFD4, D5
SPI2 serial transfer complete
FFD6, D7
Â¥ SCI1 receive data register full
Â¥ SCI1 receiver overrun
Â¥ SCI1 transmit data register empty
Â¥ SCI1 transmit complete
Â¥ SCI1 idle line detect
FFD8, D9
SPI1 serial transfer complete
FFDA, DB
Pulse accumulator input edge
FFDC, DD
Pulse accumulator overßow
FFDE, DF
Timer overßow
FFE0, E1
Timer input capture 4/output compare 5
FFE2, E3
Timer output compare 4
FFE4, E5
Timer output compare 3
FFE6, E7
Timer output compare 2
FFE8, E9
Timer output compare 1
FFEA, EB
Timer input capture 3
FFEC, ED
Timer input capture 2
FFEE, EF
Timer input capture 1
FFF0, F1
Real-time interrupt
FFF2, F3
IRQ pin
FFF4, F5
XIRQ pin
FFF6, F7
Software interrupt
FFF8, F9
Illegal opcode trap
FFFA, FB
COP failure
FFFC, FD
Clock monitor fail
FFFE, FF
RESET
CCR Local
mask bit mask
Ñ
Ñ
I IEH[7:0]
T8AI
I
T8BI
T8CI
RIE2
RIE2
I
TIE2
TCIE2
ILIE2
I SP2IE
RIE
RIE
I
TIE
TCIE
ILIE
I
SPIE
I
PAII
I PAOVI
I
TOI
I I4/O5I
I
OC4I
I
OC3I
I
OC2I
I
OC1I
I
IC3I
I
IC2I
I
IC1I
I
RTII
I
None
X None
None None
None None
None NOCOP
None CME
None None
MOTOROLA
10-14
RESETS AND INTERRUPTS
TPG
MC68HC11PH8