MC68HC11PH8 Datasheet, PDF (160/264 Pages) Motorola, Inc – High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit

8.1.8.2 PACNT — Pulse accumulator count register
Address bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
Pulse accumulator count (PACNT) $0027 (bit 7) (6) (5) (4) (3) (2) (1) (bit 0) undeÞned
This 8-bit read/write register contains the count of external input events at the PAI input, or the
accumulated count. In gated time accumulation mode, PACNT is readable even if PAI is not active.
The counter is not affected by reset and can be read or written at any time. Counting is
synchronized to the internal PH2 clock so that incrementing and reading occur during opposite
half cycles.
8.1.8.3 Pulse accumulator status and interrupt bits
The pulse accumulator control bits, PAOVI and PAII, PAOVF and PAIF are located within timer
registers TMSK2 and TFLG2.
8.1.8.4 TMSK2 — Timer interrupt mask 2 register
8
Address bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
Timer interrupt mask 2 (TMSK2) $0024 TOI RTII PAOVI PAII 0
0 PR1 PR0 0000 0000
8.1.8.5 TFLG2 — Timer interrupt flag 2 register
Timer interrupt ßag 2 (TFLG2)
Address bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
$0025 TOF RTIF PAOVF PAIF 0
0
0
0 0000 0000
PAOVI and PAOVF — Pulse accumulator interrupt enable and overflow flag
The PAOVF status bit is set each time the pulse accumulator count rolls over from $FF to $00. To
clear this status bit, write a one in the corresponding data bit position (bit 5) of the TFLG2 register.
The PAOVI control bit allows the pulse accumulator overflow to be configured for polled or
interrupt-driven operation and does not affect the state of PAOVF. When PAOVI is zero, pulse
accumulator overflow interrupts are inhibited, and the system operates in a polled mode, which
requires that PAOVF be polled by user software to determine when an overflow has occurred.
When the PAOVI control bit is set, a hardware interrupt request is generated each time PAOVF is
set. Before leaving the interrupt service routine, software must clear PAOVF.
MOTOROLA
8-26
TIMING SYSTEM
TPG
MC68HC11PH8