 English |
|
|
|
|
|
|
|
| MC68HC16Z1CPV16 Datasheet, PDF (92/500 Pages) Freescale Semiconductor, Inc – Symbols and Operators, CPU16 Register Mnemonics | |||
| |||
| ◁ |
Freescale Semiconductor, Inc.
Table 4-4 CPU16 Implementation of M68HC11 CPU Instructions
M68HC11 Instruction
CPU16 Implementation
BHS
BCC only
BLO
BCS only
BSR
Generates a different stack frame
CLC
Replaced by ANDP
CLI
Replaced by ANDP
CLV
Replaced by ANDP
DES
Replaced by AIS
DEX
Replaced by AIX
DEY
Replaced by AIY
INS
Replaced by AIS
INX
Replaced by AIX
INY
Replaced by AIY
JMP
IND8 and EXT addressing modes replaced by IND20 and EXT20 modes
JSR
LSL, LSLD
IND8 and EXT addressing modes replaced by IND20 and EXT20 modes.
Generates a different stack frame
Use ASL instructions1
PSHX
Replaced by PSHM
PSHY
Replaced by PSHM
PULX
Replaced by PULM
PULY
Replaced by PULM
RTI
Reloads PC and CCR only
RTS
Uses two-word stack frame
SEC
Replaced by ORP
SEI
Replaced by ORP
SEV
Replaced by ORP
STOP
Replaced by LPSTOP
TAP
CPU16 CCR bits differ from M68HC11
CPU16 interrupt priority scheme differs from M68HC11
TPA
CPU16 CCR bits differ from M68HC11
CPU16 interrupt priority scheme differs from M68HC11
TSX
Adds two to SK : SP before transfer to XK : IX
TSY
Adds two to SK : SP before transfer to YK : IY
TXS
Subtracts two from XK : IX before transfer to SK : SP
TXY
Transfers XK field to YK field
TYS
Subtracts two from YK : IY before transfer to SK : SP
TYX
Transfers YK field to XK field
WAI
Waits indefinitely for interrupt or reset
Generates a different stack frame
NOTES:
1. Freescale assemblers automatically translate ASL mnemonics.
4-32
CENTRAL PROCESSING UNIT
For More Information On This Product,
Go to: www.freescale.com
M68HC16 Z SERIES
USERâS MANUAL
|
▷ |
German
Russian
Spanish
Italian
Polish
Chinese
Japanese
Korean
French
Portuguese