MC68HC16Z1CPV16 Datasheet, PDF (407/500 Pages) Freescale Semiconductor, Inc – Symbols and Operators, CPU16 Register Mnemonics

Freescale Semiconductor, Inc.
SCAN
0
0
0
0
1
1
1
1
MULT
0
0
1
1
0
0
1
1
Table D-28 ADC Conversion Mode
S8CM
0
MODE
Single 4-Conversion Single-Channel Sequence
1
Single 8-Conversion Single-Channel Sequence
0
Single 4-Conversion Multichannel Sequence
1
Single 8-Conversion Multichannel Sequence
0
Multiple 4-Conversion Single-Channel Sequences
1
Multiple 8-Conversion Single-Channel Sequences
0
Multiple 4-Conversion Multichannel Sequences
1
Multiple 8-Conversion Multichannel Sequences
CD:CA — Channel Selection
Bits in this field select input channel or channels for A/D conversion.
Conversion mode determines which channel or channels are selected for conversion
and which result registers are used to store conversion results. Tables D-29 and D-30
contain a summary of the effects of ADCTL1 bits and fields.
M68HC16 Z SERIES
USER’S MANUAL
REGISTER SUMMARY
For More Information On This Product,
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D-33