MC68HC16Z1CPV16 Datasheet, PDF (271/500 Pages) Freescale Semiconductor, Inc – Symbols and Operators, CPU16 Register Mnemonics

Freescale Semiconductor, Inc.
Interrupt requests are asserted until associated status flags are cleared. Status flags
must be cleared in a particular sequence. The status register must first be read for set
flags, then zeros must be written to the flags that are to be cleared. If a new event oc-
curs between the time that the register is read and the time that it is written, the asso-
ciated flag is not cleared.
For more information on interrupts, refer to 5.8 Interrupts. For more information on
exceptions, refer to 4.13.4 Types of Exceptions.
11.5 Pin Descriptions
The GPT uses 12 of the MCU pins. Each pin can perform more than one function. De-
scriptions of GPT pins divided into functional groups follow.
11.5.1 Input Capture Pins
Each input capture pin is associated with a single GPT input capture function. Each
pin has hysteresis. Any pulse longer than two system clocks is guaranteed to be valid
and any pulse shorter than one system clock is ignored. Each pin has an associated
16-bit capture register that holds the captured counter value. These pins can also be
used for general-purpose I/O. Refer to 11.8.2 Input Capture Functions for more in-
formation.
11.5.2 Input Capture/Output Compare Pin
The input capture/output compare pin can be configured for use by either an input cap-
ture or an output compare function. It has an associated 16-bit register that is used for
holding either the input capture value or the output match value. When used for input
capture the pin has the same hysteresis as other input capture pins. The pin can be
used for general-purpose I/O. Refer to 11.8.2 Input Capture Functions and 11.8.3
Output Compare Functions for more information.
11.5.3 Output Compare Pins
Output compare pins are used for GPT output compare functions. Each pin has an as-
sociated 16-bit compare register and a 16-bit comparator. Pins OC2, OC3, and OC4
are associated with a specific output compare function. The OC1 function can affect
the output of all compare pins. If the OC1 pin is not needed for an output compare
function it can be used to output the clock selected for the timer counter register. Any
of these pins can also be used for general-purpose I/O. Refer to 11.8.3 Output Com-
pare Functions for more information.
11.5.4 Pulse Accumulator Input Pin
The pulse accumulator input (PAI) pin connects a discrete signal to the pulse accumu-
lator for timed or gated pulse accumulation. PAI has hysteresis. Any pulse longer than
two system clocks is guaranteed to be valid and any pulse shorter than one system
clock is ignored. It can be used as a general-purpose input pin. Refer to 11.10 Pulse
Accumulator for more information.
M68HC16 Z SERIES
USER’S MANUAL
GENERAL-PURPOSE TIMER
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