MC68HC16Z1CPV16 Datasheet, PDF (457/500 Pages) Freescale Semiconductor, Inc – Symbols and Operators, CPU16 Register Mnemonics

Freescale Semiconductor, Inc.
PACTL EQU $F90C ;PULSE ACCUMULATOR CONTROL REGISTER
PACNT EQU $F90D ;PULSE ACCUMULATOR COUNTER
TIC1 EQU $F90E ;INPUT CAPTURE REGISTER 1
TIC2 EQU $F910 ;INPUT CAPTURE REGISTER 2
TIC3 EQU $F912 ;INPUT CAPTURE REGISTER 3
TOC1 EQU $F914 ;OUTPUT COMPARE REGISTER 1
TOC2 EQU $F916 ;OUTPUT COMPARE REGISTER 2
TOC3 EQU $F918 ;OUTPUT COMPARE REGISTER 3
TOC4 EQU $F91A ;OUTPUT COMPARE REGISTER 4
TI4O5 EQU $F91C ;INPUT CAPTURE 4 OR OUTPUT COMPARE 5
TCTL1 EQU $F91E ;TIMER CONTROL REGISTER 1
TCTL2 EQU $F91F ;TIMER CONTROL REGISTER 2
TMSK1 EQU $F920 ;TIMER INTERRUPT MASK REGISTER 1
TMSK2 EQU $F921 ;TIMER INTERRUPT MASK REGISTER 2
TFLG1 EQU $F922 ;TIMER INTERRUPT FLAG REGISTER 1
TFLG2 EQU $F923 ;TIMER INTERRUPT FLAG REGISTER 2
CFORC EQU $F924 ;COMPARE FORCE REGISTER
PWMC EQU $F924 ;PWM CONTROL REGISTER
PWMA EQU $F926 ;PWM REGISTER A
PWMB EQU $F927 ;PWM REGISTER B
PWMCNT EQU $F928 ;PWM COUNTER REGISTER
PWMBUFA EQU $F92A ;PWM BUFFER REGISTER A
PWMBUFB EQU $F92B ;PWM BUFFER REGISTER B
PRESCL EQU $F92C ;GPT PRESCALER
***** ADC MODULE REGISTERS *****
ADCMCR EQU $F700 ;ADC MODULE CONFIGURATION REGISTER
ADTEST EQU $F702 ;ADC TEST REGISTER
ADCPDR EQU $F706 ;ADC PORT DATA REGISTER
ADCTL0 EQU $F70A ;A/D CONTROL REGISTER 0
ADCTL1 EQU $F70C ;A/D CONTROL REGISTER 1
ADSTAT EQU $F70E ;ADC STATUS REGISTER
RJURR0 EQU $F710 ;RIGHT JUSTIFIED UNSIGNED RESULT REGISTER 0
RJURR1 EQU $F712 ;RIGHT JUSTIFIED UNSIGNED RESULT REGISTER 1
RJURR2 EQU $F714 ;RIGHT JUSTIFIED UNSIGNED RESULT REGISTER 2
RJURR3 EQU $F716 ;RIGHT JUSTIFIED UNSIGNED RESULT REGISTER 3
RJURR4 EQU $F718 ;RIGHT JUSTIFIED UNSIGNED RESULT REGISTER 4
RJURR5 EQU $F71A ;RIGHT JUSTIFIED UNSIGNED RESULT REGISTER 5
RJURR6 EQU $F71C ;RIGHT JUSTIFIED UNSIGNED RESULT REGISTER 6
RJURR7 EQU $F71E ;RIGHT JUSTIFIED UNSIGNED RESULT REGISTER 7
LJSRR0 EQU $F720 ;LEFT JUSTIFIED SIGNED RESULT REGISTER 0
LJSRR1 EQU $F722 ;LEFT JUSTIFIED SIGNED RESULT REGISTER 1
LJSRR2 EQU $F724 ;LEFT JUSTIFIED SIGNED RESULT REGISTER 2
LJSRR3 EQU $F726 ;LEFT JUSTIFIED SIGNED RESULT REGISTER 3
LJSRR4 EQU $F728 ;LEFT JUSTIFIED SIGNED RESULT REGISTER 4
LJSRR5 EQU $F72A ;LEFT JUSTIFIED SIGNED RESULT REGISTER 5
LJSRR6 EQU $F72C ;LEFT JUSTIFIED SIGNED RESULT REGISTER 6
LJSRR7 EQU $F72E ;LEFT JUSTIFIED SIGNED RESULT REGISTER 7
LJURR0 EQU $F730 ;LEFT JUSTIFIED UNSIGNED RESULT REGISTER 0
LJURR1 EQU $F732 ;LEFT JUSTIFIED UNSIGNED RESULT REGISTER 1
LJURR2 EQU $F734 ;LEFT JUSTIFIED UNSIGNED RESULT REGISTER 2
LJURR3 EQU $F736 ;LEFT JUSTIFIED UNSIGNED RESULT REGISTER 3
LJURR4 EQU $F738 ;LEFT JUSTIFIED UNSIGNED RESULT REGISTER 4
LJURR5 EQU $F73A ;LEFT JUSTIFIED UNSIGNED RESULT REGISTER 5
LJURR6 EQU $F73C ;LEFT JUSTIFIED UNSIGNED RESULT REGISTER 6
LJURR7 EQU $F73E ;LEFT JUSTIFIED UNSIGNED RESULT REGISTER 7
M68HC16 Z SERIES INITIALIZATION AND PROGRAMMING EXAMPLES
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