MC68HC16Z1CPV16 Datasheet, PDF (53/500 Pages) Freescale Semiconductor, Inc – Symbols and Operators, CPU16 Register Mnemonics

Freescale Semiconductor, Inc.
3.7 Address Space Maps
Figures 3-11 through 3-16 show CPU16 address space for M68HC16 Z-series MCUs.
Address space can be split into physically distinct program and data spaces by decod-
ing the MCU function code outputs.
Figures 3-11, 3-12, and 3-13 show the memory map of a system that has combined
program and data spaces. Figures 3-14, 3-15, and 3-16 show the memory map when
MCU function code outputs are decoded.
Reset and exception vectors are mapped into bank 0 and cannot be relocated. The
CPU16 program counter, stack pointer, and Z index register can be initialized to any
address in pseudolinear memory, but exception vectors are limited to 16-bit address-
es. To access locations outside of bank 0 during exception handler routines (including
interrupt exceptions), a jump table must be used. Refer to SECTION 4 CENTRAL
PROCESSOR UNIT for more information concerning memory management, extend-
ed addressing, and exception processing. Refer to SECTION 5 SYSTEM INTEGRA-
TION MODULE for more information concerning function codes, address space types,
resets, and interrupts.
M68HC16 Z SERIES
USER’S MANUAL
OVERVIEW
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