MC68HC16Z1CPV16 Datasheet, PDF (10/500 Pages) Freescale Semiconductor, Inc – Symbols and Operators, CPU16 Register Mnemonics

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Freescale Semiconductor, Inc.
TABLE OF CONTENTS
(Continued)
Title
Page
SECTION 10
MULTICHANNEL COMMUNICATION INTERFACE
10.1 General ....................................................................................................10-1
10.2 MCCI Registers and Address Map ..........................................................10-2
10.2.1
MCCI Global Registers ....................................................................10-2
10.2.1.1
Low-Power Stop Mode ............................................................10-2
10.2.1.2
Privilege Levels .......................................................................10-3
10.2.1.3
MCCI Interrupts .......................................................................10-3
10.2.2
Pin Control and General-Purpose I/O .............................................10-4
10.3 Serial Peripheral Interface (SPI) ..............................................................10-4
10.3.1
SPI Registers ..................................................................................10-6
10.3.1.1
SPI Control Register (SPCR) ..................................................10-6
10.3.1.2
SPI Status Register (SPSR) ....................................................10-6
10.3.1.3
SPI Data Register (SPDR) ......................................................10-6
10.3.2
SPI Pins ...........................................................................................10-6
10.3.3
SPI Operating Modes ......................................................................10-7
10.3.3.1
Master Mode ...........................................................................10-7
10.3.3.2
Slave Mode .............................................................................10-8
10.3.4
SPI Clock Phase and Polarity Controls ...........................................10-8
10.3.4.1
CPHA = 0 Transfer Format .....................................................10-9
10.3.4.2
CPHA = 1 Transfer Format ...................................................10-10
10.3.5
SPI Serial Clock Baud Rate ..........................................................10-11
10.3.6
Wired-OR Open-Drain Outputs .....................................................10-11
10.3.7
Transfer Size and Direction ...........................................................10-11
10.3.8
Write Collision ...............................................................................10-12
10.3.9
Mode Fault ....................................................................................10-12
10.4 Serial Communication Interface (SCI) ...................................................10-13
10.4.1
SCI Registers ................................................................................10-13
10.4.1.1
SCI Control Registers ...........................................................10-13
10.4.1.2
SCI Status Register ...............................................................10-16
10.4.1.3
SCI Data Register .................................................................10-16
10.4.2
SCI Pins ........................................................................................10-16
10.4.3
Receive Data Pins (RXDA, RXDB) ...............................................10-17
10.4.4
Transmit Data Pins (TXDA, TXDB) ...............................................10-17
10.4.5
SCI Operation ................................................................................10-17
10.4.5.1
Definition of Terms ................................................................10-17
10.4.5.2
Serial Formats .......................................................................10-18
10.4.5.3
Baud Clock ............................................................................10-18
10.4.5.4
Parity Checking .....................................................................10-19
10.4.5.5
Transmitter Operation ...........................................................10-19
10.4.5.6
Receiver Operation ...............................................................10-20
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