MC68HC16Z1CPV16 Datasheet, PDF (422/500 Pages) Freescale Semiconductor, Inc – Symbols and Operators, CPU16 Register Mnemonics

Freescale Semiconductor, Inc.
SPBR[7:0] — Serial Clock Baud Rate
The QSPI uses a modulus counter to derive the SCK baud rate from the MCU system
clock. Baud rate is selected by writing a value from two to 255 into SPBR[7:0]. The
following equation determines the SCK baud rate:
SCK Baud Rate = ₂-----_×-----_S----_P-^f--^s-_B-^y--^s-_R----_[--₇---_:--₀----_]
or
SPBR[7:0] = ₂-----_×-----_S----_C----_K------_B----_a----_u-^f--_d^s---^y--^s_R----_a----_t-_e-----_D-----_e---_s---_i-_r--_e----_d--
Giving SPBR[7:0] a value of zero or one disables the baud rate generator. SCK is dis-
abled and assumes its inactive state value. No serial transfers occur. At reset, the SCK
baud rate is initialized to one-eighth of the system clock frequency. SPBR has 254 ac-
tive values. Table D-36 lists several possible baud values and the corresponding SCK
frequency based on a 16.78-MHz system clock.
Table D-36 Examples of SCK Frequencies
f_sys
16.78 MHz
Required
Division Ratio
4
8
16
34
168
510
Value of SPBR
2
4
8
17
84
255
Actual SCK
Frequency
4.19 MHz
2.10 MHz
1.05 MHz
493 kHz
100 kHz
33 kHz
D.6.11 QSPI Control Register 1
SPCR1 — QSPI Control Register 1
$YFFC1A
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
SPE
DSCKL[6:0]
DTL[7:0]
RESET:
0
0
0
0
0
1
0
0
0
0
0
0
0
1
0
0
SPCR1 enables the QSPI and specifies transfer delays. SPCR1 must be written last
during initialization because it contains SPE. Writing a new value to SPCR1 while the
QSPI is enabled disrupts operation.
SPE — QSPI Enable
0 = QSPI is disabled. QSPI pins can be used for general-purpose I/O.
1 = QSPI is enabled. Pins allocated by PQSPAR are controlled by the QSPI.
D-48
REGISTER SUMMARY
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M68HC16 Z SERIES
USER’S MANUAL