MC68HC16Z1CPV16 Datasheet, PDF (495/500 Pages) Freescale Semiconductor, Inc – Symbols and Operators, CPU16 Register Mnemonics

Freescale Semiconductor, Inc.
Signed fractions 4-6
SIM 5-1
address map D-4
block diagram 5-2
bus operation 5-36
chip-selects 5-61
external bus interface (EBI) 5-29
features 3-1
functional blocks 5-1
halt monitor 5-25
interrupt arbitration 5-3
interrupts 5-58
parallel I/O ports 5-70
periodic interrupt timer 5-27
reference manual 5-67
register access 5-3
registers
chip-select
base address
register boot (CSBARBT) D-17
registers (CSBAR) 5-64, 5-65, D-17
option
register boot (CSORBT) D-18
registers (CSOR) 5-64, 5-66, D-18
pin assignment registers (CSPAR) 5-64,
D-15
clock synthesizer control register (SYNCR) D-7
master shift registers A/B (TSTMSRA/TSTM-
SRB) D-22
module configuration register (SIMCR) 5-2, D-6
periodic interrupt
control register (PICR) D-13
timer register (PITR) 5-28, D-14
port C data register (PORTC) 5-67, D-15
port E
data direction register (DDRE) 5-70, D-9
data register (PORTE) 5-71, D-9
pin assignment register (PEPAR) 5-70,
D-10
port F
data direction register (DDRF) 5-70, D-11
data register (PORTF) 5-71
data registers (PORTF) D-10
pin assignment register (PFPAR) 5-70,
D-11
reset status register (RSR) D-8
software service register (SWSR) D-15
system
protection control register (SYPCR) D-12
test register
(SIMTR) D-7
E (SIMTRE) D-9
test module
control register (CREG) D-22
distributed register (DREG) D-22
repetition count register (TSTRC) D-22
shift count register (TSTSC) D-22
reset 5-48
state of pins 5-54
software watchdog 5-25
block diagram (with PIT) 5-25
spurious interrupt monitor 5-25
system
clock
block diagram 5-4
protection 5-24
system clock 5-4
synthesizer operation 5-6
SIMCR 5-2, 8-3, D-6
SIMTR D-7
SIMTRE D-9
Single
-channel conversions D-34
-step mode 11-4
SIZ 5-54
SIZE (MCCI) 10-11
Size signals (SIZ) 5-32, 5-35, 5-47
SK 4-3, 4-5
Slave select signal (SS). See SS 9-20
SLOCK D-8
Slow reference circuit 5-5
SM 4-4, D-3
Software watchdog 5-25
block diagram 5-27
clock rate 5-26
enable (SWE) 5-25, D-12
prescale (SWP) 5-26, D-12
ratio of SWP and SWT bits 5-26
reset (SW) D-8
timeout period calculation 5-26, D-12
timing field (SWT) 5-26, D-12
Source voltage level (V_SRC) 8-22
SP 4-3
SPACE (address space select) 5-67, D-21
SPBR D-48
SPCR 10-6, D-64
SPCR0 D-46
SPCR1 D-48
SPCR2 D-49
SPCR3 D-50
SPDR 10-6, D-66
SPE 9-6, D-48
SPI 10-1
block diagram 10-5
clock phase/polarity controls 10-8
finished flag (SPIF) D-65
interrupt level (ILSPI) D-57
mode fault 10-12
operating modes
master mode 10-7
slave mode 10-8
pins 10-6
registers
control register (SPCR) 10-6, D-64
data register (SPDR) 10-6, D-66
status register (SPSR) 10-6, D-65
serial clock baud rate 10-11
timing A-50
— master, CPHA = 0/CPHA = 1 A-51
— slave, CPHA = 0/CPHA = 1 A-52
M68HC16 Z SERIES
USER’S MANUAL
For More Information On This Product,
I-13
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