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MC68HC16Z1CPV16 Datasheet, PDF (46/500 Pages) Freescale Semiconductor, Inc – Symbols and Operators, CPU16 Register Mnemonics
Freescale Semiconductor, Inc.
Table 3-1 M68HC16 Z-Series Pin Characteristics (Continued)
Pin
Mnemonic
Output
Driver
Input
Synchronized
Input
Hysteresis
Discrete
I/O
Port
Designation
PCLK4
—
Y
Y
I
—
PCS0/SS
Bo
Y
Y
I/O
PQS3
PCS[3:1]
Bo
Y
Y
I/O
PQS[6:4]
PWMA, PWMB5
A
—
—
O
—
R/W
A
Y
N
—
—
RESET
Bo
Y
Y
—
—
RXD
—
N
N
—
—
RXDA3
Bo
Y
Y
—
PMC6
RXDB3
Bo
Y
Y
—
PMC4
SCK3
Bo
Y
Y
—
PMC2
SCK
Bo
Y
Y
I/O
PQS2
SIZ[1:0]
B
Y
Y
I/O
PE[7:6]
SS3
Bo
Y
Y
—
PMC3
TSC
—
Y
Y
—
—
TXD
Bo
Y
Y
I/O
PQS7
TXDA3
Bo
Y
Y
—
PMC7
TXDB3
Bo
Y
Y
—
PMC5
XFC2
—
—
—
Special
—
XTAL2
—
—
—
Special
—
NOTES:
1. DATA[15:0] are synchronized during reset only. MODCLK, QSM, MCCI and ADC pins are synchronized
only when used as input port pins.
2. EXTAL, XFC, and XTAL are clock reference connections.
3. MCCI pins used only on the MC68HC16Z4/CK16Z4.
4. PAI and PCLK can be used for discrete input, but are not part of an I/O port.
5. PWMA and PWMB can be used for discrete output, but are not part of an I/O port.
Type
A
Aw
B
Bo
Table 3-2 M68HC16 Z-Series Driver Types
I/O
Description
O Three-state capable output signals
O Type A output with weak p-channel pull-up during reset
O
Three-state output that includes circuitry to pull up output before high impedance is established,
to ensure rapid rise time
O Type B output that can be operated in an open-drain mode
3-12
OVERVIEW
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M68HC16 Z SERIES
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