XRT72L53 Datasheet, PDF (71/467 Pages) Exar Corporation – THREE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

XRT72L53
REV. P1.1.7
THREE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
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PRELIMINARY
Bit 7 - Local Loopback Mode
This Read/Write bit-field is used to command the
Framer chip to operate in the Local Loopback Mode.
Setting this bit-field to "0", configures the Framer chip
to operate in the Normal Mode. Setting this bit-field to
"1", configures the Framer chip to operate in the Lo-
cal-Loopback Mode.
NOTE: For a detailed description of the Local Loopback
Mode, please see Section 6.0
Bit 6 - DS3/E3* Select
This Read/Write bit-field is used to command the
Framer chip to operate in either the DS3 Mode or the
E3 Mode.
Setting this bit-field to "0", configures the Framer chip
to operate in the E3 Mode. Setting this bit-field to "1",
configures the Framer chip to operate in the DS3
Mode.
Bit 5 - Internal LOS Enable Select
This Read/Write bit-field is used to configure the
Framer chip to either declare an LOS condition,
based upon the Internal Circuit's criteria or not.
Setting this bit-field to "0", configures the Framer chip
to NOT declare an LOS condition, based upon its
own internal criteria.
Setting this bit-field to "1", configures the Framer chip
to declare an LOS condition based upon its own inter-
nal criteria.
NOTES:
1. The XRT72L53 Framer Chip will declare an LOS
condition, anytime the RLOS input pin (pin 78) is
set "High", independent of the setting of this bit-
field.
2. For more information on the XRT72L53 Framer's
internal criteria for Loss of Signal please see Sec-
tion 3.3.2.5.
Bit 4 - RESET:
This Read/Write bit-field is used to command the
XRT72L53 Framer chip into the Reset state. If the
XRT72L53 Framer chip is commanded into the Reset
state, all of its internal register bits will automatically
be set to their default condition.
Setting this bit-field to "0" configures the XRT72L53
Framer chip to operate normally. Setting this bit-field
to "1" configures the XRT72L53 Framer chip to go in-
to the Reset Mode.
Bit 3 - Interrupt Enable Reset
This Read/Write bit-field is used to configure the
XRT72L53 Framer chip to automatically disable all In-
terrupts that are activated.
Setting this bit-field to "0" configures the XRT72L53
Framer chip to NOT disable the Interrupt Enable Sta-
tus, of any interrupts, following their activation.
Setting this bit to "1" configures the XRT72L53 Fram-
er chip to automatically disable any interrupt that is
activated.
NOTE: For more information on this feature, please see
Section 1.6.1.
Bit 2 - Frame Format Select
This Read/Write bit-field, along with the DS3/E3 se-
lect bit-field (bit 6 in this register) is used to select the
Framing Format that the XRT72L53 will operate in.
The following table relates the states of this bit-field
(bit 2) and that of bit 6 to the selected framing format
for this chip.
BIT 6 - DS3/E3
SELECT
0
0
1
1
BIT 2 - FRAME SELECTED FRAMING
FORMAT SELECT
FORMAT
0
E3, ITU-T G.751
1
E3, ITU-T G.832
0
DS3, C-bit Parity
1
DS3, M13
Bits 1 & 0 - TimRefSel[1:0] - Timing Reference Se-
lect
These two Read/Write bit-fields is used to select both
a Framing Reference and Timing Reference for the
Transmit Section of the XRT72L53. The following ta-
ble relates the states of these two bit-fields to the se-
lected Framing and Timing references.
TIMREFSEL[1:0]
00
01
10
11
FRAMING
REFERENCE
TIMING REFERENCE
Asynchronous
RxLineClk Input
Signal
TxFrameRef
TxInClk Input sig-
nal
Asynchronous TxInClk Input sig-
nal
Asynchronous TxInClk Input sig-
nal
NOTE: For more information on Framing and Timing Refer-
ences, please see Section 3.2.
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