XRT72L53 Datasheet, PDF (25/467 Pages) Exar Corporation – THREE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

XRT72L53
THREE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
REV. P1.1.7
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PRELIMINARY
PIN DESCRIPTION CONNECTED PINS
PIN #
H18
PIN NAME
RxNib2[0]/
TYPE
O
DESCRIPTION
Receive Nibble Output - Bit 2/Receive HDLC Data Output - Bit 2;
Channel 0:
The exact function of this bit-field depends upon whether Channel 0 has
been configured to operate in the “High-Speed HDLC Controller” Mode,
or not.
RxHDLCDat2[0]
H19
RxNib3[0]/
Non-High-Speed HDLC Controller Mode - Receive Nibble Output -
Bit 2:
The Receive Section of Channel 0 will output Received data (from the
Remote Terminal) to the local Terminal Equipment via this pin along
with RxNib0[0], RxNib1[0] and RxNib2[0].
The data at this pin is updated on the rising edge of the RxClk[0] output
signal.
NOTE: This output pin is active only if the Nibble-Parallel Mode has
been selected.
High-Speed HDLC Controller Mode - Receive HDLC Data Output -
Bit 2:
This pin functions as bit 2, within the byte-wide Receive HDLC Control-
ler output interface (RxHDLCDat[7:0]) whenever Channel 0 has been
configured to operate in the “High-Speed HDLC Controller” Mode.
O
Receive Nibble Output - Bit 2/Receive HDLC Data Output - Bit 3;
Channel 0:
The exact function of this bit-field depends upon whether Channel 0 has
been configured to operate in the “High-Speed HDLC Controller” Mode,
or not.
RxHDLCDat3[0]
H20
Int
J1
TxFrameRef[2]
Non-High-Speed HDLC Controller Mode - Receive Nibble Output -
Bit 3:
The Receive Section of Channel 0 will output Received data (from the
Remote Terminal) to the local Terminal Equipment via this pin along
with RxNib0[0], RxNib1[0] and RxNib2[0].
The data at this pin is updated on the rising edge of the RxClk[0] output
signal.
NOTE: This output pin is active only if the Nibble-Parallel Mode has
been selected.
High-Speed HDLC Controller Mode - Receive HDLC Data Output -
Bit 3:
This pin functions as bit 3, within the byte-wide Receive HDLC Control-
ler output interface (RxHDLCDat[7:0]) whenever Channel 0 has been
configured to operate in the “High-Speed HDLC Controller” Mode.
O
Interrupt Request Output:
This open-drain, active-low output signal will be asserted when the
Framer device is requesting interrupt service from the local micropro-
cessor. This output pin should typically be connected to the Interrupt
Request input of the local microprocessor.
I
Transmit Framer Reference Input - Channel 1:
See Description for Pin E1
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