XRT72L53 Datasheet, PDF (371/467 Pages) Exar Corporation – THREE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

XRT72L53
THREE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
REV. P1.1.8
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PRELIMINARY
The E3 frame structure also contains bits which can
be used to transport User Data Link information and
Path Maintenance Data Link information. The UDL
(User Data Link) bits are only accessible via the
Transmit Overhead Data Input Interface. The Path
Maintenance Data Link (PMDL) bits can either be
sourced from the Transmit LAPD Controller/Buffer or
via the Transmit Overhead Data Input Interface.
Table 72 lists the Overhead Bits within the DS3
frame. Additionally, this table also indicates whether
or not these overhead bits can be sourced by the
Transmit Overhead Data Input Interface or not.
TABLE 72: A LISTING OF THE OVERHEAD BITS WITHIN THE E3 FRAME, AND THEIR POTENTIAL SOURCES, WITHIN THE
XRT72L53 IC
OVERHEAD BIT
FA1 - Bit 7
INTERNALLY GENERATED
Yes
ACCESSIBLE VIA THE TRANSMIT OVERHEAD
DATA INPUT INTERFACE
No
BUFFER/REGISTER
ACCESSIBLE
Yes*
FA1 - Bit 6
Yes
No
Yes
FA1 - Bit 5
Yes
No
Yes*
FA1 - Bit 4
Yes
FA1 - Bit 3
Yes
No
Yes*
No
Yes
FA1 - Bit 2
Yes
No
Yes
FA1 - Bit 1
Yes
No
Yes+
FA1 - Bit 0
Yes
No
Yes
FA2 - Bit 7
Yes
No
Yes
FA2 - Bit 6
Yes
No
Yes
FA2 - Bit 5
Yes
No
Yes
FA2 - Bit 4
Yes
No
Yes
FA2 - Bit 3
Yes
No
Yes
FA2 - Bit 2
Yes
No
Yes
FA2 - Bit 1
Yes
No
Yes
FA2 - Bit 0
Yes
No
Yes
EM - Bit 7
Yes
Yes
Yes
EM - Bit 6
Yes
Yes
Yes
EM - Bit 5
Yes
Yes
Yes
EM - Bit 4
Yes
Yes
Yes
EM - Bit 3
Yes
Yes
Yes
EM - Bit 2
Yes
Yes
Yes
EM - Bit 1
Yes
Yes
Yes
EM - Bit 0
Yes
Yes
Yes
TR - Bit 7
No
Yes
Yes
TR - Bit 6
No
Yes
Yes
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