XRT72L53 Datasheet, PDF (143/467 Pages) Exar Corporation – THREE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

XRT72L53
REV. P1.1.7
THREE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
áç
PRELIMINARY
neClk[n] signals will be routed directly to the Tx-
POS[n], TxNEG[n] and TxLineClk[n] signals.
Setting this bit-field to “1” configures the channel to
operate in the Remote Loop-Back Mode.
Bit 5 - REQ - (Receive Equalization Enable/Disable
Select)
This Read/Write bit-field allows for control of the state
of the REQ output pin of the Framer. This output pin is
intended to be connected to the REQ input pin of the
XRT7300 DS3/E3/STS-1 LIU IC. If this signal is tog-
gled "High”, then the internal Receive Equalizer (with-
in the XRT7300) will be disabled. Conversely, if the
this signal is toggled "Low”, then the Receive Equaliz-
er (within the XRT7300) will be enabled.
The purpose of the internal Receive Equalizer (within
the XRT7300) is to compensate for the Frequency-
Dependent attenuation (e.g., cable loss), that a line
signal will experience as it travels through coaxial ca-
ble, from the transmitting to the receiving terminal.
Writing a “1” to this bit-field causes the Framer to tog-
gle the REQ output pin "High”. Writing a “0” to this bit-
field causes the Framer to toggle the REQ output pin
"Low”.
For information on the criteria that should be used
when deciding whether to enable or disable the Re-
ceive Equalizer, please consult the XRT7300 DS3/
E3/STS-1 LIU IC Data Sheet.
NOTE: If the customer is not using the XRT7300 DS3/E3/
STS-1 IC, then this bit-field and the REQ output pin can be
used for other purposes.
Bit 4 - TAOS - (Transmit All Ones Signal)
This Read/Write bit-field allows for controlling the
state of the TAOS output pin of the Framer. This out-
put pin is intended to be connected to the TAOS input
pin of the XRT7300 DS3/E3/STS-1 LIU IC. If this sig-
nal is toggled "High”, then the XRT7300 will transmit
an All Ones pattern onto the line. Conversely, if this
output signal toggles "Low” then the XRT7300 DS3/
E3/STS-1 LIU IC will proceed to transmit data based
upon the data that it receives via the TxPOS and Tx-
NEG output pins (of the Framer IC).
Writing a “1” to this bit-field causes the TAOS output
pin to toggle "High”. Writing a “0” to this bit-field will
cause this output pin to toggle "Low”.
NOTE: If the customer is not using the XRT7300 DS3/E3/
STS-1 LIU IC, then this bit-field, and the TAOS output pin
can be used for other purposes.
Bit 3 - ENCODIS - (B3ZS/HDB3 Encoder Disable)
This Read/Write bit-field is used for controlling the
state of the ENCODIS output pin of the Framer. This
output pin is intended to be connected to the ENCO-
DIS input pin of the XRT7300 DS3/E3/STS-1 LIU IC.
If this signal is toggled "High”, then the internal B3ZS/
HDB3 encoder (within the XRT7300) will be disabled.
Conversely, if this output signal is forced to toggle
"Low”, then the internal B3ZS/HDB3 encoder (within
the XRT7300) will be enabled.
Writing a “1” to this bit-field causes the Framer IC to
toggle the Encodis output pin "High”. Writing a “0” to
this bit-field will cause the Framer IC to toggle this
output pin "Low”.
NOTES:
1. The B3ZS/HDB3 encoder, within the XRT7300 is
not to be confused with the B3ZS/HDB3 encoding
capabilities that exists within the Transmit DS3/E3
Framer block of the Framer IC.
2. It is advisable to disable the B3ZS/HDB3 encoder
(within the XRT7300 IC) if the Transmit and
Receive DS3/E3 Framer (within the XRT72L53) are
configured to operate in the B3ZS/HDB3 line code.
3. If the customer is not using the XRT7300 DS3/E3/
STS-1 LIU IC, then this bit-field and the Encodis
output pin can be used for other purposes.
4. It is permissible to tie both the ENCODIS and
DECODIS input pins (of the XRT7300) to the Enco-
dis output pin of the XRT72L53 DS3/E3 Framer IC.
Bit 2 - TxLEV (Transmit Line Build-Out Enable/
Disable Select)
This Read/Write bit-field allows for the control of the
state of the TxLEV output pin of the Framer. This out-
put pin is intended to be connected to the TxLEV in-
put pin of the XRT7300 DS3/E3/STS-1 LIU IC.
Writing a “1” to this bit-field commands the Framer to
drive the TxLEV output pin "High”.
Writing a “0” to this bit-field commands the Framer to
drive this output signal "Low”.
If this signal is commanded to toggle "High”, then the
Transmit Line Build-Out circuitry, within the XRT7300
will be disabled. In this mode, the XRT7300 LIU IC
will generate unshaped (e.g., square) pulses out onto
the line, via the TTIP and TRING output pins.
Conversely, if this signal is commanded to toggle
"Low”, then the Transmit Line Build-Out circuitry, with-
in the XRT7300 will be enabled. In this mode, the
XRT7300 will generate shaped pulses onto the line,
via the TTIP and TRING output pins.
In order to comply with the Isolated DSX-3 Pulse
Template requirements (per Bellcore GR-499-
CORE), it is advisable to set this bit-field to “0” if the
cable length (between the transmit output of the
XRT7300 and the DSX-3 Cross Connect System) is
less than 225 feet. Conversely, it is advisable to set
this bit-field to “1” if the cable length (between the
transmit output of the XRT7300 and the DSX-3 Cross
Connect System) is greater than 225 feet.
143