XRT72L53 Datasheet, PDF (126/467 Pages) Exar Corporation – THREE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

áç THREE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
PRELIMINARY
XRT72L53
REV. P1.1.7
Hence, the contents of the other byte (of the partially
read PMON register) will reside within the PMON
Holding register.
2.4.8.12 One-Second Error Status Register
ONE-SECOND ERROR STATUS REGISTER (ADDRESS = 0X6D)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Errored
Second
Severely
Errored
Second
RO
RO
RO
RO
RO
RO
RO
RO
0
0
0
0
0
0
0
0
Bit 1 - Errored Second
This bit field indicates whether or not an error has oc-
curred within the last One-Second accumulation in-
terval. This bit-field will be set to “1” if at least one er-
ror has occurred during the last One-Second accu-
mulation interval. Conversely, this bit-field will be set
to "0" if no errors has occurred during the last one-
second accumulation interval.
Bit 0 - Severely Errored Second
This bit-field indicates whether or not the error rate in
the last one-second interval was greater than 1 in
1000. A "0" indicates that the error rate did not ex-
ceed 1 in 1000 in the last One-Second interval.
2.4.8.13 One-Second Line Code Violation Accu-
mulator Register - MSB
LCV - ONE-SECOND ACCUMULATOR REGISTER - MSB (ADDRESS = 0X6E)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
LCV - One-Second Count - High Byte
RO
RO
RO
RO
RO
RO
RO
RO
0
0
0
0
0
0
0
0
This Read-Only register, along with the LCV - One-
Second Accumulator Register - LSB (Address =
0x6F) contains a 16-bit representation of the number
of LCV (Line Code Violation) Events that have been
detected by the Receive DS3/E3 Framer block, within
the last one-second sampling period. This register
contains the MSB (or Upper-Byte) value of this 16 bit
expression.
2.4.8.14 One-Second Line Code Violation Accu-
mulator Register - LSB
LCV - ONE-SECOND ACCUMULATOR REGISTER - LSB (ADDRESS = 0X6F)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
LCV - One-Second Count - Low Byte
RO
RO
RO
RO
RO
RO
0
0
0
0
0
0
BIT 1
RO
0
BIT 0
RO
0
This Read-Only register, along with the LCV - One-
Second Accumulator Register - MSB (Address =
0x6E) contains a 16-bit representation of the number
of LCV (Line Code Violation) Events that have been
detected by the Receive DS3/E3 Framer block, within
the last One-Second sampling period. This register
contains the LSB (or Lower-Byte) value of this 16 bit
expression.
2.4.8.15 One-Second Frame Parity Error Accu-
mulator Register - MSB
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