XRT72L53 Datasheet, PDF (258/467 Pages) Exar Corporation – THREE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

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PRELIMINARY
XRT72L53
THREE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
REV. P1.1.8
TXASOURCESEL[1:0]
SOURCE OF A BIT
01
Transmit Overhead Data Input Interface
10
Transmit Payload Data Input Interface
11
Functions as a FEBE (Far-End-Block Error) bit-field.
This bit-field is set to "0", if the Near-End Receive Section (within this chip) detects no BIP-4
Errors within the incoming E3 frames.
This bit-field is set to "1", if the Near-End Receive Section (within this chip) detects a BIP-4
Error within the incoming E3 frame.
Configuring the Transmit Payload Data Input Interface
block to accept the “N” Bits from the Terminal Equip-
ment, then the user must write the value “11” into the
TxNSourceSel[1:0] bit-fields. Once the user does this,
then any value, which resides on the TxSer input pin,
when the “N” bit is being processed by the Transmit
Section will be inserted into the “N” bit-field within the
very next outbound E3 frame.
For completeness, the relationship between the con-
tents of the TxNSourceSel[1:0] bits and the resulting
source of the “N” bit is listed below.
Bits 4, 3, TxNSourceSel[1:0]
These two Read/Write bit-fields combine to specify
the source of the N-bit, within each outbound E3
frame. The relationship between these two bit-fields
and the resulting source of the N Bit is tabulated be-
low.
TXNSOURCESEL[1:0]
00
01
10
11
SOURCE OF N BIT
TxE3 Service Bits Register (Address = 0x35)
Transmit Overhead Data Input Interface
Transmit LAPD Controller
Transmit Payload Data Input Interface.
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