XRT72L53 Datasheet, PDF (378/467 Pages) Exar Corporation – THREE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

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PRELIMINARY
XRT72L53
THREE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
REV. P1.1.8
Method 1) in order to transmit a Yellow Alarm to
the remote terminal equipment.
In this example, the Terminal Equipment intends to in-
sert the appropriate overhead bits, into the Transmit
Overhead Data Input Interface, such that the
XRT72L53 will transmit a Yellow Alarm to the remote
terminal equipment. Recall that, for E3 Applications, a
Yellow Alarm is transmitted by setting the FERF bit
(within the MA Byte) to "0".
If one assumes that the connection between the Ter-
minal Equipment and the XRT72L53 are as illustrated
in Figure 170 then Figure 171 presents an illustration
of the signaling that must go on between the Terminal
Equipment and the XRT72L53.
FIGURE 171. ILLUSTRATION OF THE SIGNAL THAT MUST OCCUR BETWEEN THE TERMINAL EQUIPMENT AND THE
XRT72L53, IN ORDER TO CONFIGURE THE XRT72L53 TO TRANSMIT A YELLOW ALARM TO THE REMOTE TERMINAL
EQUIPMENT
Terminal Equipment/XRT72L5x Interface Signals
0
1
26
27
28
29
30
31
32
TxOHClk
TxOHFrame
TxOHIns
TxOH
Remaining Overhead Bits with E3 Frame
MA, Bit 7
TxOHFrame is sample “high”
Terminal Equipment asserts TxOHIns and
Data on TxOH line.
XRT72L5x Framer samples TxOHIns and
TxOHIns signal
In Figure 171 the Terminal Equipment samples the
TxOHFrame signal being "High" at rising clock edge #
“0". From this point, the Terminal Equipment waits un-
til it has detected 32 rising edges in the TxOHClk sig-
nal. At this point, the Terminal Equipment knows that
the XRT72L53 is just about to process the FERF bit
within the MA byte (in a given Outbound E3 frame).
Additionally, according to Table 74, the 32nd over-
head bit to be processed is the FERF bit. In order to
facilitate the transmission of the Yellow Alarm, the
Terminal Equipment must set this FERF bit to "1".
Hence, the Terminal Equipment starts this process by
implementing the following steps concurrently.
a. Assert the TxOHIns input pin by setting it "High".
b. Set the TxOH input pin to "0".
After the Terminal Equipment has applied these sig-
nals, the XRT72L53 will sample the data on both the
TxOHIns and TxOH signals upon the very next falling
edge of TxOHClk (designated at 32- in Figure 171).
Once the XRT72L53 has sampled this data, it will
then insert a "1" into the FERF bit position, in the Out-
bound E3 frame.
Upon detection of the very next rising edge of the Tx-
OHClk clock signal (designated as clock edge 1 in
Figure 171), the Terminal Equipment will negate the
TxOHIns signal (e.g., toggles it "Low") and will cease
inserting data into the Transmit Overhead Data Input
Interface.
6.2.2.2 Method 2 - Using the TxInClk and
TxOHEnable Signals
Method 1 requires the use of an additional clock sig-
nal, TxOHClk. However, there may be a situation in
which the user does not wish to add this extra clock
signal to their design, in order to use the Transmit
Overhead Data Input Interface. Hence, Method 2 is
available. When using Method 2, either the TxInClk or
RxOutClk signal is used to sample the overhead bits
and signals which are input to the Transmit Overhead
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