XRT72L53 Datasheet, PDF (395/467 Pages) Exar Corporation – THREE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

XRT72L53
THREE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
REV. P1.1.8
áç
PRELIMINARY
FIGURE 178. APPROACH TO INTERFACING THE XRT72L53 FRAMER IC DEVICE TO THE XRT73L03 DS3/E3/STS-1
LIU
RxAVDD_0
DVDD_0
Rx_AIS_Ch_0
RxRED_ALARM_0
Rx_OOF_Ch_0
Rx_LOS_Ch_0
RxFRAME_0
RxFRAME_CLK_0
RxDATA_IN_0
D[7:0]
A[10:0]
READY_OUT*
ALE
RD*
WR*
XRT72L53_CS*
XRT72L53_INT*
HW_RESET*
R9
100
TxFRAME_0
44.736MHz
TxDATA_OUT_0
U19
C5
B5
A3
C4
RxAIS_0
RxRED_0
RxOOF_0
RxLOS_0
F20
D20
F19
T20
RxFrame_0
RxClk_0
RxSer_0
MOTO
RxPOS_0 ^F2
RxNEG_0 ^F3
J19
J20
K17
K18
K19
K20
L20
L18
D7
D6
D5
D4
D3
D2
D1
D0
M20
M19
M18
M17
N20
N19
N18
P20
P19
P18
R20
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
J17
R19
V20
P17
R18
H20
Rdy_Dtck
ALE_AS
RDB_DS
WRB_RW
CSB
INT
T19 _RESETB
RxLineClk_0 ^F1
RLOL_0
ExtLOS_0
B8
D9
LLOOP_0
REQB_0
TAOS_0
DMO_0
TxLEV_0
C7
A5
C6
C9
C3
RLOOP_0 ^B7
ENCODIS_0 (TxOFF_0)
B2
TxPOS_0 ^C1
TxNEG_0 ^D1
TxLineClk_0 ^E2
T18 _NIBBLEINTF
E20
G4
E18
TxFrame_0
TxInClk_0
TxSER_0
XRT72L53_Ch_0
C2
0.01uF
C3
0.01uF
R8 4.7K
R7 100
70 _RxAVDD0
48 _RxDVDD0
67
42
LOSTHR_0
HOST/HW
51 _RPOS0
50 _RNEG0
49 _RCLK0
U21
TxAVDD0 ²⁸
TxAVDD0 ³⁷
RTIP0 ⁷²
RRING0 ⁷¹
XRT71D03_CS* (Optional)
57
55
RLOL_0
RLOS_0
61
62
63
64
96
CS
SCLK
SDI
SDO
REG_RESET*
117 _{TxOFF_0}
33 _{TPDATA_0}
32 _{TNDATA_0}
34
47
TCLK_0
EXCLK_0
TTIP0 ²⁹
TRING0 ²⁷
MTIP0 ³⁰
54 _RxDGND0
73 _RxAGND0
MRING0 ³¹
TxAGND0 ³⁹
TxAGND0 ²⁶
XRT73L03IV_Ch_0
C4
0.01uF
TxAVDD_0
C5
0.01uF
R2
R1
37.4
37.4
C1
0.01uF
6 _T2 1
43
T3001
R3
1 _T1 6
36
R4
34
T3001
R5
36
270
R6
270
J1
BNC
1
J2
BNC
1
The Transmit Section of the XRT72L53 contains a
block which is known as the Transmit E3 LIU Interface
block. The purpose of the Transmit E3 LIU Interface
block is to take the Outbound E3 data stream, from
the Transmit E3 Framer block, and to do the following:
1. Encode this data into one of the following line
codes
a. Unipolar (e.g., Single-Rail)
b. AMI (Alternate Mark Inversion)
c. HDB3 (High Density Bipolar - 3)
2. And to transmit this data to the LIU IC.
Figure 179 presents a simple illustration of the Trans-
mit E3 LIU Interface block.
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