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XRT72L53 Datasheet, PDF (146/467 Pages) Exar Corporation – THREE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
áç THREE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
PRELIMINARY
XRT72L53
REV. P1.1.7
XRT72L53 CONFIGURATION
The XRT72L53 DS3/E3 Framer IC can be configured
to support any of the following four framing formats.
• DS3/C-Bit Parity
• DS3/M13
• E3/ITU-T G.832
• E3/ITU-T G.751
As a consequence, the discussion of the XRT72L53
Framer IC will be organized as follows:
• Section 4.0 - DS3 Mode Operation of the
XRT72L53
• Section 5.0 - E3, ITU-T G.751 Operation of the
XRT72L53
• Section 6.0 - E3, ITU-T G.832 Operation of the
XRT72L53
• Section 7.0 - Framer Local Loop-back Mode
Operation
• Section 8.0 - High Speed HDLC Controller Mode
of Operation
4.0 DS3 OPERATION OF THE XRT72L53
This section will discuss in detail, the operation of the
XRT72L53 Framer IC, when it has been configured to
operate in the DS3 Mode.
Configuring the XRT72L53 to Operate in the DS3
Mode
The XRT72L53 can be configured to operate in the
DS3 Mode by writing a "1" into bit-field 6 within the
Framer Operating Mode register, as illustrated below.
FRAMER OPERATING MODE REGISTER (ADDRESS = 0X00)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT2
BIT 1
BIT 0
Local Loopback
R/W
x
DS3/E3*
R/W
1
Internal LOS
Enable
R/W
x
RESET
R/W
0
Interrupt
Enable Reset
R/W
x
Frame Format
R/W
x
TimRefSel[1:0]
R/W
R/W
x
x
Prior to describing the functional blocks within the
Transmit and Receive Sections of the XRT72L53, it is
important to describe the following two framing for-
mats.
• M13
• C-Bit Parity
4.1 DESCRIPTION OF THE DS3 FRAMES AND ASSOCI-
ATED OVERHEAD BITS
The role of the various overhead bits are best de-
scribed by discussing the DS3 Frame Format as a
whole. The DS3 Frame contains 4760 bits, of which
56 bits are overhead and the remaining 4704 bits are
payload bits. The payload data is formatted into pack-
ets of 84 bits and the overhead (OH) bits are inserted
between these payload packets. The XRT72L53
Framer supports the following two DS3 framing for-
mats:
• C-bit Parity
• M13
Figures 40 and 41 present the DS3 Frame Format for
C-bit Parity and M13, respectively.
FIGURE 40. DS3 FRAME FORMAT FOR C-BIT PARITY
X
I
F1
I AIC I
F0
I
NA
I
F0
I FEAC I
F1
I
I
X
I
F1
I UDL I
F0
I
NA
I
F0
I UDL I
F1
I
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