CN8330 Datasheet, PDF (86/101 Pages) Conexant Systems, Inc – DS3/E3 Framer with 52 Mbps HDLC Controller

Appendix A Multimegabit HDLC Formatter
A.1 Introduction
CN8330
DS3/E3 Framer with 52 Mbps HDLC Controller
The receiver provides complementary operation, deriving byte-organized data
and HDLC protocol status including FCS checking at serial rates up to 52 Mbps.
Figure A-1 illustrates the major data paths of the HDLC formatter.
Figure A-1. HDLC Formatter Block Diagram
Transmit Byte Clock
Transmit Data Byte
8
Send Message
Send FCS
FCS
Mode
Line
Loopback
Transmit Clock In
HDLC
Transmit
Data
Receive Clock
Receive Data
off
M
U
X
on
Transmit Clock
Transmit Data
Address/Data ⁸
Control
Microprocessor
Interface
Loopbacks
FCS Mode
Transmit Data
Transmit Clock
8
Receive Data
Receive Clock
on
M
U
X
off
Source
Loopback
Clock
Data
HDLC
Receive
FCS
Mode
Receive Byte Clock
Receive Data Byte
Idle Status
FCS Status
A-2
Conexant
100441E