CN8330 Datasheet, PDF (59/101 Pages) Conexant Systems, Inc – DS3/E3 Framer with 52 Mbps HDLC Controller

3
3.0 Registers
For a summary of all registers, refer to the Register Summary section at the end of this chapter.
3.1 Control Registers
0x00—Mode Control Register (CR00)
7
LineLp
LineLp
SourceLp
TxAlm1,0
6
SourceLp
5
TxAlm1
4
TxAlm0
3
ExtOvh
2
ExtCBit
1
E3Frm
0
CBitP/DL
Line Loopback Enable—Set to enable the loopback in the external direction (back to network).
This loopback connects the received data stream before B3ZS/HDB3 decoding to the
transmitter. All data and overhead bits are looped; and Bipolar Violations (BPVs) are fully
preserved per ANSI standard T1.404. The received data is still presented to all receiver blocks
and is present on the receiver output pins.
Source Loopback Enable—Set to enable the loopback in the internal direction. This loopback
connects the encoded transmitter data and clock directly to the receiver B3ZS/HDB3 decoder.
Transmission of data on the line is not affected by this loopback.
Transmit Alarm Control—Used to control transmission of various alarm signals. In DS3 mode,
the AIS, idle, and yellow alarm signals on the outgoing DS3 stream are controlled as follows:
TxAlm1
0
0
1
1
TxAlm0
0
1
0
1
Alarm Action
Normal, No Alarms Transmitted
Yellow Alarm (X-bits low) Transmitted
Idle Code Transmitted
AIS Transmitted
In E3 mode, the TxAlm0 bit should be set high to transmit the E3 AIS signal and the
TxAlm1 bit is set high to transmit the E3 yellow alarm (A-bit high). TxAlm0 bit has
precedence in E3 mode.
100441E
Conexant
3-1