CN8330 Datasheet, PDF (37/101 Pages) Conexant Systems, Inc – DS3/E3 Framer with 52 Mbps HDLC Controller

CN8330
DS3/E3 Framer with 52 Mbps HDLC Controller
2.0 Functional Description
2.3 Transmitter Operation
2.3.6.4 Transmitter
Control Example
This example will show the sequence necessary to transmit a 10-byte hex
message starting in the low half of the transmit buffer. With the transmitter in the
idle state, the processor would execute the following sequence:
write byte 1 to address 0x30
write byte 2 to address 0x31
write byte 3 to address 0x32
write byte 4 to address 0x33
write 0x19 to address 0x01 (TxByte[2:0] = 011, TxMsg = 1)
at TX Interrupt:
write byte 5 to address 0x34
write byte 6 to address 0x35
write byte 7 to address 0x36
write byte 8 to address 0x37
write 0x39 to address 0x01 (TxByte[2:0] = 111, TxMsg = 1)
at TX Interrupt:
write byte 9 to address 0x30
write byte 10 to address 0x31
write 0x0B to address 0x01 (TxByte[2:0] = 001, TxMsg = 1, TxFCS = 1)
at TX Interrupt:
write 00 to address 0x01 (TxMsg = 0, TxFCS = 0)
2.3.7 TxFEAC Channel Transmission
The third C-bit in subframe 1 of the M-frame is the Transmit Far End Alarm and
Control (TxFEAC) Channel. This channel uses a bit-oriented protocol and is
under control of the Transmit FEAC Channel Byte Register [CR03;0x03].
The TxFEAC Channel Transmitter is under control of the CBitP/DL, E3Frm,
and TxAlm[1,0] bits in the Mode Control Register and the Transmit FEAC
Channel Message Byte [TxFEAC[7:0];CR03.7:0] in the Transmit FEAC Channel
Byte Register. An interrupt for use with TxFEAC channel operations is available
on the DLINT/SOURCELB output pin and status bits for determining the
interrupt source are located in the Data Link Interrupt Status Register.
The framer mode must be set to C-bit parity mode for TxFEAC channel
transmission to take place. In C-bit parity mode, the last C-bit in subframe 1 of
the M-frame will be used for transmission. There is no TxFEAC channel
transmission in either E3 mode or with the CBitP/DL bit set to zero. Setting
ExtCBit in C-bit parity mode has no effect on TxFEAC channel transmission.
Setting the TxAlm[1,0] bits for transmission of AIS or all ones in C-bit parity
mode will disable transmission of the TxFEAC channel. Transmission of yellow
alarm or idle code in C-bit parity mode has no effect on TxFEAC channel
transmission.
100441E
Conexant
2-15