CMX983 Datasheet, PDF (91/93 Pages) CML Microcircuits – Programmable Channel Filter

Analogue Front End (AFE) for Digital Radio
CMX983
Figure 42 PLL2 Lock Time
Note: The above graph shows the lock times for a change in f_VCO from 2044MHz (IDIV = 426, FDIV =
$D55555) to 2125MHz (IDIV = 443, FDIV = $B55555) for f_COMP = 4.8MHz (RDIV = $4) and 250A charge
pump current. Without fast lock: Loop Filter (reference design as shown in Figure 21)
C1 = 1n5F / C2 = 9n4F (4n7F//4n7F) / R2 = 4k7ohms / R3 = 1k2ohms / C3 = 180pF
0.35
0.3
0.25
0.2
0.15
0.1
0.05
0
0
2
4
6
8
10
12
14
16
18
Fast lock current (x Charge Pump Current)
Figure 43 PLL2 Indicated Lock Time vs. Fast Lock Current (2125 to 2043 MHz)
Note: Fast lock timer, coarse = 6, fine = 1, giving 213µs
 2015 CML Microsystems Plc
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D/983/6