CMX983 Datasheet, PDF (52/93 Pages) CML Microcircuits – Programmable Channel Filter

Analogue Front End (AFE) for Digital Radio
CMX983
These bits are active when PLL1[2]_LOCKDET bit 14 = 1:
PLL1[2]_LOCKDET b12-8: Reserved, set to 0
PLL1[2]_LOCKDET b7-4: Lock discharge rate
These bits control the discharge rate of the analogue lock detector capacitor, which determines the
time taken for the lock signal to go inactive when lock is lost. The discharge rate is specified as a
multiple of the selected charge rate (see bits 3-0).
PLL1[2]_LOCKDET
bits 7-4
Discharge rate
$0
5 x charge rate
$1
7 x charge rate
$2
10 x charge rate
$3
15 x charge rate
$4
20 x charge rate
$5
30 x charge rate
$6
50 x charge rate
$7
70 x charge rate
PLL1[2]_LOCKDET
bits 7-4
Discharge rate
$8
100 x charge rate
$9
150 x charge rate
$A
200 x charge rate
$B
300 x charge rate
$C
500 x charge rate
$D-$F
Do not use
PLL1[2]_LOCKDET b3-0: Lock charge rate
These bits control the charge rate of the analogue lock-detector capacitor, and so determine the time
taken for the lock signal to become active when the phase detector inputs are in phase. The nominal
time taken for the capacitor to fully charge from a reset state, assuming no discharge pulses occur, is
shown below:
PLL1[2]_LOCKDET
bits 3-0
Charge time
$0
5 µs
$1
7 µs
$2
10 µs
$3
15 µs
$4
20 µs
$5
30 µs
$6
50 µs
$7
70 µs
PLL1[2]_LOCKDET
bits 3-0
Charge time
$8
100 µs
$9
150 µs
$A
200 µs
$B
300 µs
$C
500 µs
$D
700 µs
$E
1 ms
$F
Do not use
Digital configuration bits
These bits are active when PLL1[2]_LOCKDET bit 14 = 0:
PLL1[2]_LOCKDET b12-11: Loss-of-lock window
While the loss-of-lock counter is active (i.e. lock = 1), these bits determine the phase detector error
window: if the difference in arrival time of the phase detector inputs is outside this window, they are
deemed to be “out of phase”. When enough consecutive “out of phase” pulses occur (determined by
PLL1[2]_LOCKDET bits 7-5) then the lock signal gets set to 0. The loss-of-lock window is specified as
a multiple of the lock window value, which in turn is determined by PLL1[2]_LOCKDET bits 10-8.
PLL1[2]_LOCKDET
bits 12-11
Loss-of-lock window
 2015 CML Microsystems Plc
52
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