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CMX983 Datasheet, PDF (82/93 Pages) CML Microcircuits – Programmable Channel Filter
Analogue Front End (AFE) for Digital Radio
CMX983
Operating Characteristics (continued)
AC Parameters
C-BUS Timing
Input pin rise/fall time (10% - 90% of IOVDD)
Capacitive load on RDATA and IRQN
tCSE CSN enable to SCLK high time
tCSH Last SCLK high to CSN high time
tLOZ SCLK low to RDATA output enable time
tHIZ CSN high to RDATA high impedance
tCSOFF CSN high time between transactions
tCK SCLK cycle time
tCH SCLK high time
tCL SCLK low time
tCDS CDATA setup time
tCDH CDATA hold time
tRDV SCLK low to RDATA valid time
Serial Port Timing
Input pin rise/fall time (10% - 90% of IOVDD)
Capacitive load on Rx and Tx port output pins
tRCK RXCLK cycle time
tRCKH RXCLK high time
tRCKL RXCLK low time
tRCHD RXCLK high to RXD or RXFS delay
tRCLOZ RXCLK high to RXD output enable time
tRXDS RXD or RXFS setup time to RXCLK low
tRXDH RXD or RXFS hold time from RXCLK low
tTCK
tTCKH
tTCKL
tTCHD
tTXDS
tTXDH
TXCLK cycle time
TXCLK high time
TXCLK low time
TXCLK high to TXFS delay
TXD or TXFS setup time to TXCLK low
TXD or TXFS hold time from TXCLK low
Notes Min. Typ. Max. Unit
–
–
–
–
40
–
40
–
30
0
–
30
–
–
40
–
100
–
40
–
40
–
25
–
25
–
31
0
–
3
ns
30
pF
–
ns
–
ns
–
ns
30
ns
–
ns
–
ns
–
ns
–
ns
–
ns
–
ns
35
ns
–
–
–
–
100
–
40
–
40
–
31
-20
–
30
0
–
20
–
20
–
100
–
40
–
40
–
31
-20
–
20
–
20
–
3
ns
30
pF
–
ns
–
ns
–
ns
20
ns
–
ns
–
ns
–
ns
–
ns
–
ns
–0
ns
20
ns
–
ns
–
ns
Notes: 30. Measured with Test Load B on output pin
31. Measured with Test Load A on output pin
 2015 CML Microsystems Plc
82
D/983/6