CMX983 Datasheet, PDF (16/93 Pages) CML Microcircuits – Programmable Channel Filter

Analogue Front End (AFE) for Digital Radio
CMX983
6 C-BUS Interface
6.1 C-BUS Operation
This block provides for the transfer of data and control or status information between the CMX983 and the
host processor over the C-BUS serial bus. Each transaction consists of a single register address byte sent
from the host which may be followed by a data word sent from the host to be written into one of the C-BUS’s
write-only registers, or a data word read out from one of the C-BUS’s read-only registers; all C-BUS data
words are a multiple of 8 bits wide, the width depending on the source or destination register. Note that
certain C-BUS transactions require only an address byte to be sent from the host, no data transfer being
required. The operation of the C-BUS is illustrated in Figure 7.
Data sent from the host on the CDATA (command data) line is clocked into the CMX983 on the rising edge of
the SCLK input. Data sent from the CMX983 to the host on the RDATA (reply data) line is valid when SCLK is
high. The CSN line must be held low during a data transfer and kept high between transfers. The C-BUS
interface is compatible with most common µC serial interfaces and may also be easily implemented with
general-purpose µC I/O pins controlled by a simple software routine.
C-BUS single byte command (no data)
CSN
SCLK
CDATA
76543210
MSB
Address
LSB
Note:
 ^{The SCLK line may be high or}
low at the start and end of each
transaction.
RDATA Hi-Z
= Level not important
C-BUS n-bit register write
CSN
SCLK
CDATA
7 6 5 4 3 2 1 0 n-1 n-2 n-3
210
MSB
Address
LSB MSB
Write data
LSB
RDATA Hi-Z
C-BUS n-bit register read
CSN
SCLK
CDATA
76543210
MSB
Address
LSB
RDATA Hi-Z
n-1 n-2 n-3
210
MSB
Read data
LSB
Figure 7 Basic C-BUS Transactions
 2015 CML Microsystems Plc
16
D/983/6