CMX983 Datasheet, PDF (26/93 Pages) CML Microcircuits – Programmable Channel Filter

Analogue Front End (AFE) for Digital Radio
9 Receive Channel
9.1 Rx Signal Routing and ADCs
CMX983
Figure 12 Rx Input Switching
The I/Q inputs connect to the main ADCs through a signal switching block and programmable gain amplifiers
as shown in Figure 12. The calibration inputs can be connected to the programmable gain amplifiers to assist
with system setup. Each ADC is a fourth-order sigma-delta type that outputs a single-bit pulse density
modulated bitstream to the following digital channel filters. Status bits are produced that indicate an input
overload; these can be read from the RX_STATUS register (section 9.2).
Each input requires an external anti-alias filter, although the high oversampling rate typically used by the
sigma-delta modulator relaxes the design requirements of these filters. To achieve optimum performance,
signals at the sampling frequency (typically around 2.4MHz) should be attenuated to -110dB or lower.
Additionally, in order to reduce the complexity of the digital channel filters, the anti-alias filter may be able to
usefully suppress signals at the first decimation rate.
The outputs of the Rx A and Rx B programmable gain amplifiers are also connected to channels 6 and 7 of
the Auxiliary ADC through differential-to-single-ended converters (see section 13). Enabling either differential-
to-single-ended converter in the Auxiliary ADC automatically enables the associated Rx A or Rx B
programmable gain amplifier, without also enabling that channel’s sigma-delta modulator. This feature can be
used to implement a low power input signal level monitor during periods when the main Rx signal path is not
active.
 2015 CML Microsystems Plc
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