CMX983 Datasheet, PDF (42/93 Pages) CML Microcircuits – Programmable Channel Filter

Analogue Front End (AFE) for Digital Radio
CMX983
TX_COEFF0 - $36: 16-bit Write, data-streaming
TX_COEFF1 - $37: 16-bit Write, data-streaming
Reset value = undefined
Bit:
15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
FIR coefficient values (2’s complement)
These two C-BUS locations allow the 128-word FIR coefficient RAMs for Tx channel A and B to be
loaded. Each coefficient RAM can be loaded in ascending order by repeatedly writing data to the
same C-BUS location (an internal address pointer automatically increments after each write). To
increase the loading rate of the coefficients, data-streaming operation is supported for these two C-
BUS addresses. Only as many coefficients as are required (determined by the FIR length) need to be
loaded into each RAM, unused RAM locations do not need to be written.
The length of the interpolation filter, set in TX_CON2, must be an integer multiple of the first
upsample rate L1. Because of the way the interpolation filter is implemented, the coefficients must be
scrambled before loading as demonstrated in the following code example:
// initialise array of coefficients
int coefficient[FILTER_LENGTH] = {0x0002, 0x0031, 0xFFA3, ...};
// initialise pointer
cbus_write_8bits(TX_ADDR, 0x00);
// load coefficients into CMX983
for (i = 0; i < UPSAMPLE_RATE1; i++)
for (j = 0; j < FILTER_LENGTH; j += UPSAMPLE_RATE1)
cbus_write_16bits(TX_COEFF0, coefficient[i + j]);
For instance, if the first upsample ratio is set to 5 and the filter length is set to 60, the coefficients
C0..C59 would be loaded in the following sequence. Note that C0 is the coefficient that is multiplied
by the most recent data sample from the first upsampler:
C0, C5, C10, … C50, C55, C1, C6, C11, … C51, C56, C2, C7, C12, … C52, C57,
C3, C8, C13, … C53, C58, C4, C9, C14, … C54, C59
Before loading either of the two coefficient RAMs, the internal address pointer needs to be initialised
(usually to address 0); this is done by writing to register TX_ADDR. Note that both coefficient RAMs
share this address pointer, so the address needs to be initialised before each coefficient RAM is
loaded.
TX_ADDR - $38: 8-bit Write
Reset value = $00
Bit:
7
6
5
4
3
2
1
0
0
Tx coefficient address pointer
The Tx coefficient address pointer determines the address at which data gets written during a C-BUS
write to either of the Tx coefficient RAMs. The Tx coefficient address pointer automatically increments
 2015 CML Microsystems Plc
42
D/983/6