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CMX983 Datasheet, PDF (22/93 Pages) CML Microcircuits – Programmable Channel Filter
Analogue Front End (AFE) for Digital Radio
CMX983
7 Bias Generator
AVDD
VBIAS_CON
100kΩ
100kΩ
To main
ADC/DAC
AVSS
VBIAS
enable
Buffer
enable
+
-
VBBUF
VBIAS
CEXT
Figure 10 Bias Voltage Generator
The bias generator provides a mid-rail reference voltage (AVDD/2) that is used by the main ADCs and DACs.
An external decoupling capacitor is required on the VBIAS pin; no other connections should be made to this
pin. A buffered version of the bias voltage, available on the VBBUF pin, can be used to drive external circuitry.
VBIAS_CON - $10: 8-bit Write
Reset value = $00
Bit:
7
6
5
4
3
0
0
0
0
0
2
1
0
0
VBIAS Buffer
enab enab
VBIAS_CON b7-2: Reserved, set to 0
VBIAS_CON b1: VBIAS enable
Set to 1 to enable the mid-rail VBIAS generator – this must be done before using the main ADC or
DAC channels. Set to 0 to disable and powersave the VBIAS generator. Note that the VBIAS voltage
takes some time to settle, determined by the effective 50k source impedance and the value of the
external capacitor CEXT.
VBIAS_CON b0: Buffer enable
Set to 1 to enable the VBIAS buffer amplifier. Set to 0 to disable and powersave the VBIAS buffer.
When disabled, the VBBUF pin will go high impedance.
 2015 CML Microsystems Plc
22
D/983/6