CMX983 Datasheet, PDF (89/93 Pages) CML Microcircuits – Programmable Channel Filter

Analogue Front End (AFE) for Digital Radio
CMX983
Figure 39 PLL1 Lock Time
Note: The graph shown in Figure 39 shows the lock times for a change in f_VCO from 875MHz (IDIV = 182,
FDIV = $4AAAAA) to 965MHz (IDIV = 201, FDIV = $0AAAAA) for f_COMP = 4.8MHz (RDIV = $4) and 250A
charge pump current. Without fast lock: Loop Filter (reference design as shown in Figure 21)
C1 = 6n8F / C2 = 27nF / R2 = 1k5ohms / R3 = 470ohms / C3 = 470pF
1.4
1.2
1
0.8
0.6
0.4
0.2
0
0
2
4
6
8
10
12
14
16
18
Fast lock current (x Charge Pump Current)
Figure 40 PLL1 Indicated Lock Time vs. Fast Lock Current (965 to 875.525 MHz)
Note: Fast lock timer, coarse = 4, fine = 80, giving 1.067ms
 2015 CML Microsystems Plc
89
D/983/6