CMX983 Datasheet, PDF (32/93 Pages) CML Microcircuits – Programmable Channel Filter

Analogue Front End (AFE) for Digital Radio
CMX983
all data samples in FIR filter to zero (coefficient RAMs are not altered). This initialisation takes 128
CLK cycles to complete.
RX_CON2 b12-6: FIR filter length
Sets the number of taps in the FIR filter to a value between 1 and 128 (0000000 = 128). The filter
length is also subject to the following restriction, based on the CLK and ADC sample frequencies:
FilterLength  _{}
f _CLK  f _CR2
f _CR3
1_{}
RX_CON2 b5-0: Second downsample rate
Sets the division ratio between the CR2 and CR3 clock, which determines the second downsample
rate M2. This can be set to between 1 and 64 (000000 = 64). Note that the maximum CR3 clock
frequency is further restricted to f_CR3 ≤ f_CLK/4, i.e. (N × M1 × M2) ≥ 4, although this limit is unlikely to
be approached in a typical receive channel configuration.
RX_CON3 - $25: 8-bit Write
Reset value = $00
Bit:
7
6
5
4
0
Rx B FIR B coeff
enable select
3
2
1
0
0
Rx A FIR A coeff
enable select
RX_CON3 b7: Reserved, set to 0
RX_CON3 b6: Rx B enable
Set this bit to 1 to enable Rx channel B filter logic (sinc filter onwards) and start the transfer of data to
the serial port. When this bit is set to 1, the “channel B idle” bit in RX_STATUS will read as 0. After
reset, or when the Rx B enable bit is changed from 1 to 0, the channel B logic ceases operating and
an initialisation sequence is performed which resets all data samples in the sinc filter and FIR filter to
zero (coefficient RAMs are not altered). This initialisation takes 128 CLK cycles to complete, after
which the “channel B idle” bit in RX_STATUS will be set to 1.
It is recommended that the Rx B enable bit should be set to 1 only after the configuration bits in
RX_CON0/1/2 have been initialised, and that these registers do not get changed again until the Rx B
enable bit is cleared to 0 and channel B is idle.
RX_CON3 b5-4: FIR B coefficient select
Selects which bank of coefficients the channel B FIR filter uses:
00 = RX_COEFF0
01 = RX_COEFF1
10 = RX_COEFF2
11 = RX_COEFF3
RX_CON3 b3: Reserved, set to 0
RX_CON3 b2: Rx A enable
Set this bit to 1 to enable Rx channel A filter logic, similar in operation to bit 6.
RX_CON3 b1-0: FIR A coefficient select
 2015 CML Microsystems Plc
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