CMX983 Datasheet, PDF (40/93 Pages) CML Microcircuits – Programmable Channel Filter

Analogue Front End (AFE) for Digital Radio
CMX983
TX_CON2 - $34: 16-bit Write
Reset value = $0000
Bit:
15 14 13 12 11 10 9
8
7
Tx B bit select
Tx B Tx B FIR B
digital analog coeff
enable enable select
6
5
4
Tx A bit select
3
2
1
0
Tx A Tx A FIR A
digital analog coeff
enable enable select
TX_CON2 b15-11: Tx B bit select
In Tx channel B, selects which 16 bits of the 38-bit FIR filter accumulator are passed to the following
upsample stage. This value determines the number of most-significant bits discarded (valid range = 0
to 22): a value of 0 selects the most significant 16 bits of the FIR accumulator, a value of 1 discards
the MSB of the accumulator and selects the next most significant 16 bits, and so on. Convergent
rounding and saturation are applied to the selected bits. To assist with setup, an overflow causes a
status bit to be set in the TX_STATUS register.
TX_CON2 b10: Tx B digital enable
Set this bit to 1 to enable the Tx channel B logic, from the first upsampler to the sigma-delta
modulator, and start the transfer of data from the serial port. The channel idle status in the
TX_STATUS register immediately goes low when the Tx channel B logic is enabled. The Tx B digital
enable bit should be set after all other Tx channel B configuration bits have been initialised. When the
Tx B digital enable bit changes from 1 to 0, the Tx channel stops requesting data from the Tx serial
port but continues processing the buffered data (up to 2 words) until an underrun occurs. The
interpolation filter data RAM is then cleared immediately (all data samples reset to zero) in readiness
for the next time the channel is enabled; the coefficient RAMs are not altered. Clearing the data
samples takes 128 CLK cycles, after which the channel idle status gets set to 1.
If the Tx B digital enable bit goes high while the associated Tx serial port remains disabled, default
data values of $0000 will be fed into the Tx channel. This continues until the Tx serial port becomes
enabled, at which point normal data transfers through the Tx serial port will commence. If the Tx
serial port is subsequently disabled while the Tx B digital enable bit remains high, then the Tx channel
will repeatedly transmit the final 16-bit data value obtained from the Tx serial port, and a buffer
underrun will be flagged in TX_STATUS.
TX_CON2 b9: Tx B analogue enable
Set this bit to 1 to enable the Tx channel B reconstruction filter and output gain stage. Normally the
analogue enable would be activated in advance of the digital enable and deactivated after all data in
a transmission has been processed.
TX_CON2 b8: FIR B coefficient select
Selects which coefficients the channel B interpolation filter uses:
0 = TX_COEFF0
1 = TX_COEFF1
TX_CON2 b7-3: Tx A bit select
Similar in operation to bits 15-11.
TX_CON2 b2: Tx A digital enable
Set this bit to 1 to enable the Tx channel A logic, similar in operation to bit 10.
TX_CON2 b1: Tx A analogue enable
 2015 CML Microsystems Plc
40
D/983/6