SAM7X256_14 Datasheet, PDF (642/662 Pages) ATMEL Corporation – ARM-based Flash MCU

41.7
AT91SAM7X256/128 Errata - Rev. C Parts
Refer to Section 41.1 “Marking” on page 607.
Note: AT91SAM7X256 Revision C chip ID is 0x275B 0942.
AT91SAM7X128 Revision C chip ID is 0x275A 0742.
41.7.1 Boundary Scan
41.7.1.1 BSDL: BSDL File for Rev. B Devices Not Compatible with Rev. C Devices
The BSDL file dedicated to Rev. C devices must be used. No other BSDL file is compatible with Rev. C devices.
41.7.2 Embedded Flash Controller (EFC)
41.7.2.1 EFC: Embedded Flash Access Time 2
The embedded Flash maximum access time is 20 MHz (instead of 30 MHz at zero Wait State (FWS = 0).
The maximum operating frequency with one Wait State (FWS = 1) is 48.1 MHz (instead of 55 MHz). Above 48.1 MHz and
up to 55MHz, two Wait States (FWS = 2) are required.
Problem Fix/Workaround
Set the number of Wait States (FWS) according to the frequency requirements described in this errata.
41.7.3 Ethernet MAC (EMAC)
41.7.3.1 EMAC: Possible Event Loss when Reading EMAC_ISR
If an event occurs within the same clock cycle in which the EMAC_ISR is read, the corresponding bit might be cleared
even though it has not been read at 1. This might lead to the loss of this event.
Problem Fix/Workaround
Each time the software reads EMAC_ISR, it has to check the contents of the Transmit Status Register (EMAC_TSR), the
Receive Status Register (EMAC_RSR) and the Network Status Register (EMAC_NSR), as the possible lost event is still
notified in one of these registers.
41.7.3.2 EMAC: Possible Event Loss when Reading the Statistics Register Block
If an event occurs within the same clock cycle during which a statistics register is read, the corresponding counter might
lose this event. This might lead to the loss of the incrementation of one for this counter.
Problem Fix/Workaround
None
41.7.4 Peripheral Input/Output (PIO)
41.7.4.1 PIO: Electrical Characteristics on NRST, PA0-PA30 and PB0-PB26
When NRST or PA0 - PA30 or PB0 - PB26 are set as digital inputs with pull-up enabled, the voltage of the I/O stabilizes
at VPull-up.
Vpull-up
VPull-up Min
VPull-up Max
VDDIO - 0.65 V
VDDIO - 0.45 V
SAM7X Series [DATASHEET]
6120K–ATARM–11-Feb-14
642