SAM7X256_14 Datasheet, PDF (491/662 Pages) ATMEL Corporation – ARM-based Flash MCU

Figure 36-6.
CAN Resynchronization
THE PHASE ERROR IS POSITIVE
(the transmitter is slower than the receiver)
Received
data bit
Nominal
Sample point
Sample point
after resynchronization
Nominal bit time
(before resynchronization)
SYNC_
SEG
PROP_SEG
PHASE_SEG1 PHASE_SEG2 ^SYNC_
SEG
Bit time with
resynchronization
Phase error
SYNC_
SEG
PROP_SEG
Phase error (max Tsjw)
PHASE_SEG1
PHASE_SEG2 ^SYNC_
SEG
THE PHASE ERROR IS NEGATIVE
(the transmitter is faster than the receiver)
Received
data bit
Sample point
after resynchronization
Nominal
Sample point
Nominal bit time
(before resynchronization)
PHASE_SEG2
SYNC_
SEG
PROP_SEG
PHASE_SEG1 PHASE_SEG2 ^SYNC_
SEG
Bit time with
resynchronization
Phase error
PHASE_ SYNC_
SEG2 SEG
PROP_SEG
PHASE_SEG1 PHASE_SEG2 ^SYNC_
SEG
Phase error (max Tsjw)
36.6.4.3 Autobaud Mode
The autobaud feature is enabled by setting the ABM field in the CAN_MR register. In this mode, the CAN controller is
only listening to the line without acknowledging the received messages. It can not send any message. The errors flags
are updated. The bit timing can be adjusted until no error occurs (good configuration found). In this mode, the error
counters are frozen. To go back to the standard mode, the ABM bit must be cleared in the CAN_MR register.
36.6.4.4 Error Detection
There are five different error types that are not mutually exclusive. Each error concerns only specific fields of the CAN
data frame (refer to the Bosch CAN specification for their correspondence):
 CRC error (CERR bit in the CAN_SR register): With the CRC, the transmitter calculates a checksum for the CRC
bit sequence from the Start of Frame bit until the end of the Data Field. This CRC sequence is transmitted in the
CRC field of the Data or Remote Frame.
 Bit-stuffing error (SERR bit in the CAN_SR register): If a node detects a sixth consecutive equal bit level during the
bit-stuffing area of a frame, it generates an Error Frame starting with the next bit-time.
 Bit error (BERR bit in CAN_SR register): A bit error occurs if a transmitter sends a dominant bit but detects a
recessive bit on the bus line, or if it sends a recessive bit but detects a dominant bit on the bus line. An error frame
is generated and starts with the next bit time.
 Form Error (FERR bit in the CAN_SR register): If a transmitter detects a dominant bit in one of the fix-formatted
segments CRC Delimiter, ACK Delimiter or End of Frame, a form error has occurred and an error frame is
generated.
 Acknowledgment error (AERR bit in the CAN_SR register): The transmitter checks the Acknowledge Slot, which is
transmitted by the transmitting node as a recessive bit, contains a dominant bit. If this is the case, at least one
other node has received the frame correctly. If not, an Acknowledge Error has occurred and the transmitter will
start in the next bit-time an Error Frame transmission.
SAM7X Series [DATASHEET]
6120K–ATARM–11-Feb-14
491