SAM7X256_14 Datasheet, PDF (27/662 Pages) ATMEL Corporation – ARM-based Flash MCU

9.3 Power Management Controller
The Power Management Controller uses the Clock Generator outputs to provide:
 the Processor Clock PCK
 the Master Clock MCK
 the USB Clock UDPCK
 all the peripheral clocks, independently controllable
 four programmable clock outputs
The Master Clock (MCK) is programmable from a few hundred Hz to the maximum operating frequency of the device.
The Processor Clock (PCK) switches off when entering processor idle mode, thus allowing reduced power consumption
while waiting for an interrupt.
Figure 9-3.
Power Management Controller Block Diagram
SLCK
MAINCK
PLLCK
Master Clock Controller
Prescaler
/1,/2,/4,...,/64
Processor
Clock
Controller
Idle Mode
Peripherals
Clock Controller
ON/OFF
PCK
int
MCK
periph_clk[2..18]
SLCK
MAINCK
PLLCK
Programmable Clock Controller
Prescaler
/1,/2,/4,...,/64
pck[0..3]
PLLCK
USB Clock Controller
ON/OFF
Divider
/1,/2,/4
UDPCK
9.4 Advanced Interrupt Controller
 Controls the interrupt lines (nIRQ and nFIQ) of an ARM Processor
 Individually maskable and vectored interrupt sources
 Source 0 is reserved for the Fast Interrupt Input (FIQ)
 Source 1 is reserved for system peripherals (RTT, PIT, EFC, PMC, DBGU, etc.)
 Other sources control the peripheral interrupts or external interrupts
 Programmable edge-triggered or level-sensitive internal sources
 Programmable positive/negative edge-triggered or high/low level-sensitive external sources
 8-level Priority Controller
 Drives the normal interrupt nIRQ of the processor
 Handles priority of the interrupt sources
 Higher priority interrupts can be served during service of lower priority interrupt
 Vectoring
 Optimizes interrupt service routine branch and execution
 One 32-bit vector register per interrupt source
 Interrupt vector register reads the corresponding current interrupt vector
SAM7X Series [DATASHEET] 27
6120K–ATARM–11-Feb-14