SAM7X256_14 Datasheet, PDF (465/662 Pages) ATMEL Corporation – ARM-based Flash MCU

35.5 Functional Description
35.5.1 Analog-to-digital Conversion
The ADC uses the ADC Clock to perform conversions. Converting a single analog value to a 10-bit digital data requires
Sample and Hold Clock cycles as defined in the field SHTIM of the “ADC Mode Register” on page 472 and 10 ADC Clock
cycles. The ADC Clock frequency is selected in the PRESCAL field of the Mode Register (ADC_MR).
The ADC clock range is between MCK/2, if PRESCAL is 0, and MCK/128, if PRESCAL is set to 63 (0x3F). PRESCAL
must be programmed in order to provide an ADC clock frequency according to the parameters given in the Product
definition section.
35.5.2 Conversion Reference
The conversion is performed on a full range between 0V and the reference voltage pin ADVREF. Analog inputs between
these voltages convert to values based on a linear conversion.
35.5.3 Conversion Resolution
The ADC supports 8-bit or 10-bit resolutions. The 8-bit selection is performed by setting the bit LOWRES in the ADC
Mode Register (ADC_MR). By default, after a reset, the resolution is the highest and the DATA field in the data registers
is fully used. By setting the bit LOWRES, the ADC switches in the lowest resolution and the conversion results can be
read in the eight lowest significant bits of the data registers. The two highest bits of the DATA field in the corresponding
ADC_CDR register and of the LDATA field in the ADC_LCDR register read 0.
Moreover, when a PDC channel is connected to the ADC, 10-bit resolution sets the transfer request sizes to 16-bit.
Setting the bit LOWRES automatically switches to 8-bit data transfers. In this case, the destination buffers are optimized.
SAM7X Series [DATASHEET]
6120K–ATARM–11-Feb-14
465