SAM7X256_14 Datasheet, PDF (601/662 Pages) ATMEL Corporation – ARM-based Flash MCU

38.8.6.2 JTAG Interface Signals
Table 38-28. JTAG Interface Timing specification
Symbol
Parameter
Conditions
JTAG₀
TCK Low Half-period
(1)
JTAG₁
TCK High Half-period
(1)
JTAG₂
TCK Period
(1)
JTAG₃
TDI, TMS Setup before TCK High
(1)
JTAG₄
TDI, TMS Hold after TCK High
(1)
JTAG₅
TDO Hold Time
(1)
JTAG₆
TCK Low to TDO Valid
(1)
JTAG₇
Device Inputs Setup Time
(1)
JTAG₈
Device Inputs Hold Time
(1)
JTAG₉
Device Outputs Hold Time
(1)
JTAG₁₀
TCK to Device Outputs Valid
(1)
Note: 1. V_VDDIO from 3.0V to 3.6V, maximum external capacitor = 40pF
Figure 38-11. JTAG Interface Signals
TCK
JTAG₂
JTAG₀
Min
6.5
5.5
12
2
3
4
0
3
6
JTAG₁
TMS/TDI
JTAG₃
JTAG₄
TDO
Device
Inputs
Device
Outputs
JTAG₅
JTAG₆
JTAG₇
JTAG₈
JTAG₉
JTAG₁₀
Max
Units
ns
ns
ns
ns
ns
ns
16
ns
ns
ns
ns
18
ns
SAM7X Series [DATASHEET]
6120K–ATARM–11-Feb-14
601