SAM7X256_14 Datasheet, PDF (498/662 Pages) ATMEL Corporation – ARM-based Flash MCU

After Receive Mode is enabled, the MRDY flag in the CAN_MSR register is automatically cleared until the first message
is received. When the first message has been accepted by the mailbox, the MRDY flag is set. An interrupt is pending for
the mailbox while the MRDY flag is set. This interrupt is masked depending on the mailbox flag in the CAN_IMR global
register.
If a new message is received while the MRDY flag is set, this new message is stored in the mailbox data register,
overwriting the previous message. The MMI flag in the CAN_MSRx register notifies the software that a message has
been dropped by the mailbox. This flag is cleared when reading the CAN_MSRx register.
The CAN controller may store a new message in the CAN data registers while the application reads them. To check that
CAN_MDHx and CAN_MDLx do not belong to different messages, the application must check the MMI field in the
CAN_MSRx register before and after reading CAN_MDHx and CAN_MDLx. If the MMI flag is set again after the data
registers have been read, the software application has to re-read CAN_MDHx and CAN_MDLx (see Figure 36-12).
Figure 36-12. Receive with Overwrite Mailbox
Message ID = CAN_MIDx
CAN BUS
MRDY
(CAN_MSRx)
MMI
(CAN_MSRx)
Message 1
Message 2
Message 3
Message 4
(CAN_MDLx
CAN_MDHx)
MTCR
(CAN_MCRx)
Message 1
Message 2
Message 3
Message 4
Reading CAN_MSRx
Reading CAN_MDHx & CAN_MDLx
Writing CAN_MCRx
36.7.3.4 Chaining Mailboxes
Several mailboxes may be used to receive a buffer split into several messages with the same ID. In this case, the
mailbox with the lowest number is serviced first. In the receive and receive with overwrite modes, the field PRIOR in the
CAN_MMRx register has no effect. If Mailbox 0 and Mailbox 5 accept messages with the same ID, the first message is
received by Mailbox 0 and the second message is received by Mailbox 5. Mailbox 0 must be configured in Receive Mode
(i.e., the first message received is considered) and Mailbox 5 must be configured in Receive with Overwrite Mode.
Mailbox 0 cannot be configured in Receive with Overwrite Mode; otherwise, all messages are accepted by this mailbox
and Mailbox 5 is never serviced.
If several mailboxes are chained to receive a buffer split into several messages, all mailboxes except the last one (with
the highest number) must be configured in Receive Mode. The first message received is handled by the first mailbox, the
second one is refused by the first mailbox and accepted by the second mailbox, the last message is accepted by the last
mailbox and refused by previous ones (see Figure 36-13).
SAM7X Series [DATASHEET]
6120K–ATARM–11-Feb-14
498