SAM7X256_14 Datasheet, PDF (299/662 Pages) ATMEL Corporation – ARM-based Flash MCU

Fi is a binary value encoded on a 4-bit field, named FI, as represented in Table 30-4.
Table 30-4.
FI field
Fi (decimal
Binary and Decimal Values for Fi
0000 0001 0010 0011
372
372
558
744
0100
1116
0101
1488
0110
1860
1001
512
1010
768
1011
1024
1100
1536
1101
2048
Table 30-5 shows the resulting Fi/Di Ratio, which is the ratio between the ISO7816 clock and the baud rate clock.
Table 30-5. Possible Values for the Fi/Di Ratio
Fi/Di
372
558
774
1116
1488
1806
512
768
1024
1536
2048
1
372
558
744
1116
1488
1860
512
768
1024
1536
2048
2
186
279
372
558
744
930
256
384
512
768
1024
4
93
139.5
186
279
372
465
128
192
256
384
512
8
46.5
69.75
93
139.5
186
232.5
64
96
128
192
256
16
23.25
34.87
46.5
69.75
93
116.2
32
48
64
96
128
32
11.62
17.43
23.25 34.87
46.5
58.13
16
24
32
48
64
12
31
46.5
62
93
124
155
42.66
64
85.33
128
170.6
20
18.6
27.9
37.2
55.8
74.4
93
25.6
38.4
51.2
76.8
102.4
If the USART is configured in ISO7816 Mode, the clock selected by the USCLKS field in the Mode Register (US_MR) is
first divided by the value programmed in the field CD in the Baud Rate Generator Register (US_BRGR). The resulting
clock can be provided to the SCK pin to feed the smart card clock inputs. This means that the CLKO bit can be set in
US_MR.
This clock is then divided by the value programmed in the FI_DI_RATIO field in the FI_DI_Ratio register (US_FIDI). This
is performed by the Sampling Divider, which performs a division by up to 2047 in ISO7816 Mode. The non-integer values
of the Fi/Di Ratio are not supported and the user must program the FI_DI_RATIO field to a value as close as possible to
the expected value.
The FI_DI_RATIO field resets to the value 0x174 (372 in decimal) and is the most common divider between the ISO7816
clock and the bit rate (Fi = 372, Di = 1).
Figure 30-5 shows the relation between the Elementary Time Unit, corresponding to a bit time, and the ISO 7816 clock.
Figure 30-5. Elementary Time Unit (ETU)
ISO7816 Clock
on SCK
FI_DI_RATIO
ISO7816 Clock Cycles
ISO7816 I/O Line
on TXD
1 ETU
30.6.2 Receiver and Transmitter Control
After reset, the receiver is disabled. The user must enable the receiver by setting the RXEN bit in the Control Register
(US_CR). However, the receiver registers can be programmed before the receiver clock is enabled.
After reset, the transmitter is disabled. The user must enable it by setting the TXEN bit in the Control Register (US_CR).
However, the transmitter registers can be programmed before being enabled.
SAM7X Series [DATASHEET]
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