AK8186B Datasheet, PDF(52/69 Page) Asahi Kasei Microsystems – Multi Output Clock Generator with Integrated 2.0GHz VCO

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AK8186B Datasheet, PDF (52/69 Pages) Asahi Kasei Microsystems – Multi Output Clock Generator with Integrated 2.0GHz VCO

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AK8186B

Address

(Hex)

Bit(s)

Name

VCO Frequency

7 Monitor

Description

Enable or disable VCO frequency monitor.

0: disable VCO frequency monitor (default).

1: enable VCO frequency monitor.

REF2(REFINn) Enable or disable REF2 frequency monitor.

6 Frequency

0: disable REF2 frequency monitor (default).

Monitor

1: enable REF2 frequency monitor.

REF1(REFIN)

5 Frequency

Monitor

Enable or disable REF1(REFIN) frequency monitor.

0: disable REF1(REFIN) frequency monitor (default).

1: enable REF1(REFIN) frequency monitor.

0x01B

REFMON Pin

4:0 Control

[4:3:2:1:0]

00000

00001

00010

00011

00100

00101

00110

00111

01000

01001

01010

Signals

LVL

DYN

LVL

01011

01100

01101

01110

01111

10000

10001

10010

10011

10100

10101

10110

10111

11000

11001

11010

11011

11100

11101

11110

11111

LVL

DYN

LVL

Signal at REFMON Pin

Ground(dc) (default).

REF1 clock

REF2 clock (N/A differential mode)

Selected reference to PLL

Unselected reference to PLL

Status of selected reference

Status of unselected reference

Status REF1 frequency.(active high)

Status REF2 frequency.(active high)

(Status REF1 Freq.) AND (Status REF2 Freq.)

(DLD) AND (Status of selected reference)

AND (status of VCO)

Status of VCO Frequency (Active high)

Selected reference (Low=REF1,High=REF2)

Digital Lock Detect(DLD): Active High

Holdover active(active high)

LD Pin comparator output(Active high)

VDD (PLL supply)

(REF1 Clock)n

(REF2 Clock)n

(Selected reference to PLL)n

(Unselected reference to PLL)n

Status of selected reference: active low

Status of unselected reference: active low

Status of REF1 frequency(active low)

Status of REF2 frequency(active low)

((Status REF1 Freq.) AND (Status REF2 Freq.))n

((DLD) AND (Status of selected reference)

Status of VCO Frequency (Active low)

Selected reference (Low=REF2,High=REF1).

Digital Lock Detect(DLD): Active Low

Holdover active(active low)

LD Pin comparator output(Active low)

Sep-2012

- 52 -

draft-E-02

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