AK8186B Datasheet, PDF (39/69 Pages) Asahi Kasei Microsystems – Multi Output Clock Generator with Integrated 2.0GHz VCO

AK8186B
Since the AK8186B supports only the long instruction (16 bits) mode, the register 0x00[4:3] must be 11b.
The Instruction Word (16 bits)
The instruction consists of 3 parts; Read/Write command, Byte to transfer and Address. See below.
MSB
LSB
I15 I14 I13
I12
I11
I10
I9 I8 I7
I6
I5
I4
I3
I2
I1
I0
－
R/W W1 W0 A12=0 A11=0 A10=0 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
Figure 28. 16-bit Instruction Word
Table 33 16-bit Instruction Word
Bit
Name
Description
－
I15
R/W
Read or Write
I14 - I13
I12 - I0
W1 - W0
A12 - A0
Length of a transfer in bytes (See Table 34)
Address
For multibyte transfers, this address is the starting byte address.
Table 34 Byte Transfer Count
W1
W0
0
0
0
1
1
0
1
1
Byte to transfer
1
2
3
Streaming mode
Streaming mode is to transfer more than three bytes. It does not skip over reserved or blank registers.
WRITE
When I15=0, write operation is executed. The timing chart of 2-byte data write is shown below. Write data is
sampled at the rising edge of SCLK.
Figure 29. Serial Contorl Port - WRITE - MSB First
Write in Streaming mode
When data is transferred in streaming mode, the reserved and blank registers are not skipped over. Any
data written to those registers does not affect the operation of the AK8186B.
Update Register
The serial control port has a two-step registers. It consists of a buffer register and an active register.
When data is transferred to the serial control port, the data is written into the buffer register. At this point, the
written data is not active. To make this data active, an update register operation is needed. When set
0x232[0]=1, the data in the buffer register is transferred to the active register. This is called “update register”
and makes the data active. Any number of data can be written into the buffer register before executing the
update register. 0x232[0] is self-clear bit register.
draft-E-02
- 39 -
Sep-2012