AK8186B Datasheet, PDF (37/69 Pages) Asahi Kasei Microsystems – Multi Output Clock Generator with Integrated 2.0GHz VCO

AK8186B
Individual Clock Output Power Down (OUT0 to OUT9)
Operation
: Any of the clock outputs goes into power-down.
Condition
: Write the appropriate registers below, then updates the register ( 0x232[0] =1b).
Operation Timing : immediately after the register update is executed.
Table 31 Power down register for OUTPUTS
Output
Port
Register
LVPECL
LVDS/
CMOS
OUT0
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
OUT9
0xF0[1:0]
0xF1[1:0]
0xF2[1:0]
0xF3[1:0]
0xF4[1:0]
0xF5[1:0]
0x140[0]
0x141[0]
0x142[0]
0x143[0]
draft-E-02
- 37 -
Sep-2012