AK8186B Datasheet, PDF (51/69 Pages) Asahi Kasei Microsystems – Multi Output Clock Generator with Integrated 2.0GHz VCO

AK8186B
Register
Address
Bit(s)
(Hex)
Name
LD Pin
0x01A 5:0 _Control
Description
Selects the signal that is connected to the LD pin.
[5:4:3:2:1:0] Signals Signal at LD Pin
0 0 0 0 0 0 LVL
DLD (High=lock, Low=unlock) (default)
0 0 0 0 0 1 DYN
P-Channel, open-drain lock detect(analog LD)
0 0 0 0 1 0 DYN
N-Channel, open-drain lock detect(analog LD)
0 0 0 0 1 1 HIZ
High-Z LD pin.
0 0 0 1 0 0 CUR
Current source LD(110uA when DLD is true).
0 x x x x x LVL
Ground(dc);for all other cases 0xxxxx not specified
Above.
The selections that follow are the same as REFMON except 101111 and
111111.
1 0 0 0 0 0 LVL
Ground(dc).
1 0 0 0 0 1 DYN
REF1 clock
1 0 0 0 1 0 DYN
REF2 clock (N/A differential mode)
1 0 0 0 1 1 DYN
Selected reference to PLL
1 0 0 1 0 0 DYN
Unselected reference to PLL
1 0 0 1 0 1 LVL
Status of selected reference
1 0 0 1 1 0 LVL
Status of unselected reference
1 0 0 1 1 1 LVL
Status REF1 frequency.(active high)
1 0 1 0 0 0 LVL
Status REF2 frequency.(active high)
1 0 1 0 0 1 LVL
(Status REF1 Freq.) AND (Status REF2 Freq.)
1 0 1 0 1 0 LVL
(DLD) AND (Status of selected reference)
AND (status of VCO)
1 0 1 0 1 1 LVL
Status of VCO Frequency (Active high)
1 0 1 1 0 0 LVL
Selected reference (Low=REF1,High=REF2)
1 0 1 1 0 1 LVL
Digital Lock Detect(DLD): Active High
1 0 1 1 1 0 LVL
Holdover active(active high)
1 0 1 1 1 1 LVL
N/A do not use.
1 1 0 0 0 0 LVL
VDD (PLL supply)
1 1 0 0 0 1 DYN
(REF1 Clock)n
1 1 0 0 1 0 DYN
(REF2 Clock)n
1 1 0 0 1 1 DYN
(Selected reference to PLL)n
1 1 0 1 0 0 DYN
(Unselected reference to PLL)n
1 1 0 1 0 1 LVL
Status of selected reference: active low
1 1 0 1 1 0 LVL
Status of unselected reference: active low
1 1 0 1 1 1 LVL
Status of REF1 frequency(active low)
1 1 1 0 0 0 LVL
Status of REF2 frequency(active low)
1 1 1 0 0 1 LVL
((Status REF1 Freq.) AND (Status REF2 Freq.))n
1 1 1 0 1 0 LVL
((DLD) AND (Status of selected reference)
AND (status of VCO))n
1 1 1 0 1 1 LVL
Status of VCO Frequency (active low)
1 1 1 1 0 0 LVL
Selected reference (Low=REF2,High=REF1).
1 1 1 1 0 1 LVL
Digital Lock Detect(DLD): active low
1 1 1 1 1 0 LVL
Holdover active(active low)
1 1 1 1 1 1 LVL
N/A do not use.
draft-E-02
- 51 -
Sep-2012